Ion Implantation Simulation Patents: Leaders & Filing Trends 2026
- Filing has cooled since its 2024 peak. Activity rose from 15 families in 2017 to a peak of 30 in 2024, but the 2026 count of 2 (partial year) confirms the growth curve has flattened rather than accelerated.
- Claims cluster tightly in semiconductor devices. 357 of 414 records sit in H01L, with G06F, H01J and H10P forming secondary clusters — TCAD and hardware-side claims are filed together far more than they are filed apart.
- The United States dominates the filing map. 169 of the tracked records were filed at the USPTO, roughly double the Japanese office count and nearly four times China's, despite China's manufacturing scale.
Filing growth compares 2021 (4 records) with 2024 (30) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 414 records in scope (CR5), not by the ranked leaders only.
What this patent set covers
Ion implantation simulation and modeling covers the software and physical models used to predict where dopant ions come to rest in a semiconductor substrate, and what damage the implant process leaves behind. This includes Monte Carlo and analytical implant-profile simulators, damage cascade modeling, and the TCAD tooling that feeds implant predictions into device design. The dataset also captures the hardware side — implanter beam control and channeling geometry — because many filings couple a simulation claim to a specific tool or substrate configuration.
Coverage runs from 2015 through the 2026 data cut-off, drawing on 414 published patent families. Because publication typically lags filing by around eighteen months, the most recent one to two years in any trend chart will understate actual filing activity.
Filing trends and technology composition
The two views below separate momentum from concentration: one shows when the field filed, the other shows where within the IPC scheme it filed.
A flattening filing curve
Filings climbed from 15 in 2017 toward a peak of 30 in 2024, with the 2022 midpoint at 9 marking an earlier plateau. The drop to 2 in 2026 is partly a publication-lag artifact, but the shape across 2022-2024 already reads as flat-to-declining rather than compounding growth.
Concentration in semiconductor device claims
H01L accounts for 357 of 414 records, an outsized share that confirms most simulation claims are drafted as part of a semiconductor-device filing rather than a standalone software claim. G06F (94), H01J (90) and H10P (118) show meaningful but secondary weight, and C30B crystal-growth overlap (14) marks a narrow adjacent niche.
Shares are the percentage of the 414 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on Ion Implantation Simulation and Modeling with Eureka
This page is one run against one query. Ask Eureka your own question about ion implantation simulation and modeling and every answer comes back with the patent numbers behind it.
Try EurekaThe prior art doing the most work
Ion implantation simulation method (NEC Electronics)
The results of conventional analytical ion implantation simulation for the point defect distribution, for a silicon substrate on which an oxide layer or a nitride layer is formed, differ from the results of the Monte Carlo ion implantation simulation method. According to the present invention, it is unnecessary to distinguish between layers of materials in which point defects are or are not generated when determining the point defect distribution, because layers of oxide or nitride undergo the same amount of damage by ion implantation as layers of a material in which point defects are generated, such as silicon.Filed by NEC Electronics Corporation, published 2004-01-27 as US6684181B1.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US6271529B1 | Ion implantation with charge neutralization | 122 |
| 2 | US6423976B1 | Ion implanter and a method of implanting ions | 105 |
| 3 | US4771012A | Method of making symmetrically controlled implanted regions using rotational angle of the substrate | 76 |
| 4 | US20150028350A1 | Controlled Ion Implantation Into Silicon Carbide Using Channeling And Devices Fabricated Using Controlled Ion… | 69 |
| 5 | US6242747B1 | Method and system for optimizing linac operational parameters | 57 |
| 6 | US6884694B2 | Method of fabricating nano SOI wafer and nano SOI wafer fabricated by the same | 56 |
| 7 | US5100820A | MOSFET fabrication process with lightly-doped drain using local oxidation step to pattern gate electrode | 55 |
| 8 | US5308780A | Surface counter-doped N-LDD for high hot carrier reliability | 54 |
| 9 | US6008094A | Optimization of logic gates with criss-cross implants to form asymmetric channel regions | 53 |
| 10 | US5539203A | Single ion implantation system | 45 |
Citation counts are drawn from within this searched corpus and favor older filings; treat them as a measure of influence on later filers, not of current commercial relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Browse MCP servers →What the numbers mean for a filing decision
Three patterns stand out once family counts are separated from raw document counts and citation age is discounted.
Device-claim coupling is the norm
Filing a bare simulation method with no device tie-in is the exception in this corpus, not the rule. Most applicants anchor implant-profile or damage-cascade claims to a specific semiconductor structure, which narrows the room for a pure-software claim but also means device-specific carve-outs remain available.
The field has stopped compounding
Filing rose steadily to a 2024 peak of 30 before dropping sharply. Even allowing for publication lag understating 2025-2026, the 2022 midpoint of 9 shows the growth phase had already leveled off two years before the peak.
Filing geography doesn't track fab capacity
The USPTO carries roughly double the volume of the Japanese office and close to four times China's count, despite China's growing wafer fab footprint. That gap suggests either a filing-strategy lag in China or that Chinese activity in this niche is still concentrated in trade secret or process know-how rather than published patents.
The most-cited art is decades old
The highest-cited record in this set, covering charge-neutralization during implantation, dates back to the early 2000s. Heavy citation on older foundational patents is typical of a searched corpus and should be read as a marker of influence, not of what's commercially active today.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to ion implantation simulation and modeling, with the prior art for and against each one.
Who is filing, and who has gone quiet
Assignee activity in this set skews toward established semiconductor equipment and device makers, several of which show no filings in the most recent tracked year — consistent with the broader plateau in the trend line.
Established filers have paused, not exited
NEC, Applied Materials, Toshiba, Sony, Fujitsu and Varian Semiconductor Equipment all show zero filings in the latest tracked year. Given publication lag, this likely reflects filings still in the pipeline rather than a full retreat from the space, but it does mean the visible frontier is currently thin.
Co-filing is rare and mostly cross-border
Only six co-assignee pairs appear in the corpus, the strongest being a Fujitsu-Peking University pairing and a Varian Semiconductor-individual inventor pairing, each appearing twice. Joint filing is not how this field typically protects its claims.
A wave of newer Chinese specialists
Several smaller, more recently founded Chinese entities appear in the assignee list alongside the legacy multinational names, pointing to a newer cohort of specialist implant-equipment and materials suppliers entering the claim space even as the largest incumbents slow down.
| Assignee | Recent year | YoY |
|---|---|---|
| NEC Corporation | 0 | — |
| Applied Materials, Inc. | 0 | — |
| Toshiba Corporation | 0 | — |
| Sony Group Corporation | 0 | — |
| Fujitsu Limited | 0 | — |
| Varian Semiconductor Equipment Associates | 0 | — |
| Fuji Electric Co., Ltd. | 0 | — |
| Sumitomo Heavy Industries Ion Technology Co., Ltd. | 0 | — |
Where to take this next
The trend and assignee data point to a field that is consolidating around device-specific claims rather than expanding into new simulation methods.
Map the white space before filing
The under-claimed branches identified here — channeling-aware profile prediction, SiC/GaN damage modeling — are candidates for a first-mover claim rather than a crowded continuation.
Explore white space in EurekaWatch for renewed filing from paused incumbents
Six major assignees show zero filings in the latest year; publication lag means some of that activity may resurface. Tracking their pipeline now avoids a surprise grant later.
Set up assignee tracking in EurekaCheck freedom-to-operate against the highest-cited art
The most-cited records in this set are decades old but still foundational to charge-neutralization and rotational-angle implant methods. Any new filing in those areas should be checked against them directly.
Run a citation check in EurekaCommon questions about this landscape
Ion implantation simulation predicts where dopant ions will come to rest inside a substrate, and how much lattice damage the implant process causes, before a wafer is ever run through a real implanter. Fabs use it to set implant energy, dose and angle for a target doping profile, and to feed those predictions into TCAD device models. Getting this right avoids costly trial-and-error on the physical tool and shortens process development for new device nodes.
The filing trend rose from 15 families in 2017 to a peak of 30 in 2024, then dropped sharply toward 2026, with the 2022 midpoint of 9 already signaling a plateau. Part of the recent drop is a publication-lag artifact, since patents filed in 2025-2026 typically haven't published yet. But the flattening was visible well before the most recent years, suggesting the core simulation methods in this niche are maturing rather than still expanding.
The assignee base is dominated by established semiconductor equipment and device manufacturers alongside a newer cohort of Chinese specialist entrants. Notably, several of the largest historical filers — including NEC, Applied Materials, Toshiba, Sony, Fujitsu and Varian Semiconductor Equipment — show zero filings in the most recent tracked year, which may reflect pipeline lag rather than a full exit from the space. Co-filing between assignees is uncommon, with only six co-assignee pairs identified across the full 414-family dataset.
The dataset shows heavy concentration in H01L semiconductor-device claims, with much thinner coverage in areas like channeling-aware implant profile prediction for wide-bandgap substrates, damage cascade modeling specific to SiC and GaN, and TCAD feedback loops tied directly to beam-line control. These adjacent branches have far less overlap with the dominant device-claim cluster, which makes them more open for a first claim than the crowded core.
Citation counts inside a searched corpus like this one are a signal of historical influence, not of present-day commercial importance, because older patents have simply had more time to accumulate citations. The most-cited record in this set, covering charge-neutralization during implantation, dates back to the early 2000s. A newer, less-cited filing can still be more relevant to a current freedom-to-operate question than an older, heavily-cited one.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
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Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.