A DBC (direct-bond-copper) substrate is a ceramic base with copper layers bonded directly to both faces, used in power modules to carry current while conducting heat away from the die. Patent claims in this area typically centre on the bonding process, the ceramic-copper interface, and thermal conductivity or creepage clearance performance. Because DBC substrates sit at the intersection of materials science (C04B37) and semiconductor packaging (H01L), claims often cross IPC boundaries, which is worth checking when scoping a search.

This dataset shows 122 filings in 2017, the high point of the tracked window, falling to 68 by the 2022 midpoint with no later recovery. The evidence here does not include the underlying market drivers, so treat the peak as a filing-activity fact rather than evidence of a specific industry event. What is clear is that the years since have not repeated that volume, and the most recent year shows zero filings across every major tracked assignee.

The corpus includes filings from Mitsubishi Electric, Texas Instruments, Hitachi, Toshiba, Panasonic and Micron among others, with Hitachi and Toshiba entities also appearing in co-assignee pairs with their own subsidiaries. None of these assignees show filings in the latest tracked year, which is likely a mix of genuine slowdown and publication lag rather than a clean ranking of current leaders — check a live search before relying on historic volume alone.

US5945259A, assigned to Samsung Aerospace Industries and granted in 1999, claims a two-mask photoresist etching method that adds a buffer pattern around the primary etch region to eliminate sharp edge burrs on lead frame material. It blocks processes that use this specific dual-pattern buffer approach to solve the same burr problem, but it does not cover lead frame etching generally — single-mask processes, different burr-mitigation techniques, or non-photoresist masking methods fall outside its claims. Anyone designing a new etch process should compare their masking sequence against this patent's specific method steps rather than assume all etched lead frame work is blocked by it.

The IPC composition shows H01L holding 4,013 of 4,113 records, while C25D electroplating (112), C09J adhesives (130), H01B conductors (77) and C22C alloys (225) are present but comparatively thin. These narrower classes are where claim density is lowest relative to the core semiconductor-device classification, making them a reasonable starting point for a freedom-to-operate check or a new filing aimed at less-contested ground.