Nanosheet Channel Materials (GAA) Patent Landscape 2026
The nanosheet channel / gate-all-around transistor space is highly concentrated, with Taiwan Semiconductor Manufacturing Co. (TSMC) holding the largest single-applicant position among the top hundred filers, followed closely by IBM and Intel. Annual filing volume has plateaued near its 2019 peak, signalling a maturing but still active technology frontier.
TSMC, IBM, and Intel together command the nanosheet GAA patent landscape
TSMC holds the leading position in the applicant ranking, followed by IBM and Intel. The top five filers — TSMC, IBM, Intel, Qualcomm, and GlobalFoundries — account for 82% of the combined output of the hundred largest filers, a concentration level that reflects how few organisations have committed to full-stack GAA development.
The gap between the first tier (TSMC, IBM, Intel) and the second tier (Qualcomm, GlobalFoundries, Applied Materials) is substantial, indicating that meaningful participation in this space requires either deep fab capability or significant design-IP investment. The tier below those six thins out rapidly toward single-digit family counts.
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 1 | Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC) | 369 | |
| 2 | International Business Machines Corporation (IBM) | 289 | |
| 3 | Intel Corporation | 125 | |
| 4 | Qualcomm Incorporated | 52 | |
| 5 | GlobalFoundries US Inc. | 44 | |
| 6 | Applied Materials, Inc. | 33 | |
| 7 | Tokyo Electron Limited | 20 | |
| 8 | Samsung Electronics Co., Ltd. | 15 | |
| 9 | Google LLC | 10 | |
| 10 | Adeia Semiconductor Solutions LLC | 10 |
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 11 | Interuniversity Microelectronics Centre (IMEC) | 9 | |
| 12 | Parabellum Strategic Opportunities Fund LLC | 7 | |
| 13 | Synopsys, Inc. | 7 | |
| 14 | Semiconductor Manufacturing International (Beijing) Corporation | 6 | |
| 15 | Semiconductor Manufacturing International (Shanghai) Corporation | 6 | |
| 16 | French Alternative Energies and Atomic Energy Commission (CEA) | 6 | |
| 17 | Huawei Technologies Co., Ltd. | 6 | |
| 18 | IBM Deutschland GmbH | 5 | |
| 19 | Institute of Microelectronics, Chinese Academy of Sciences | 5 | |
| 20 | National Taiwan University | 5 |
TSMC’s position as the leading pure-play foundry suggests the nanosheet transition is being driven partly by process-node competition, while IBM’s standing reflects its long-running research leadership in exploratory transistor architectures. Intel’s strong recent momentum indicates a deliberate catch-up or platform-differentiation strategy.
Filings from 2024 onward are subject to publication lag and will likely revise upward; treat the apparent softness in those years as an artefact of the data collection window rather than a confirmed trend reversal. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.
Activity peaked in 2019 and has plateaued; semiconductor device classes dominate the IPC mix
Two charts together describe the pace and shape of this field: annual filing volume over the past decade and the distribution across IPC technology classes.
Annual filing trend
Filings rose sharply from 74 in 2017 to a peak of 154 in 2019, then settled into a 117–142 range through 2022 before easing to 122 and 121 in 2023 and 2024 respectively. The 2025 and 2026 bars (8 and 2) reflect publication lag and should not be read as a real decline; the multi-year plateau remains the defining pattern.
↗ Hover for values · click a bar to ask EurekaTechnology composition
H01L (Semiconductor devices) and H10D (Semiconductor devices, general) together account for the overwhelming majority of classifications, confirming that nanosheet GAA work is concentrated in core transistor structure and process. H10B (Memory device manufacture) and B82Y (Nanotechnology applications) each contribute meaningfully but at far lower shares, pointing to selective extension of nanosheet techniques into memory and nano-fabrication.
↗ Hover for values · click a bar to ask EurekaHighly cited patent families surfaced by the query
Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.
Self-aligned hybrid substrate stacked gate-all-aro…
A semiconductor structure including vertically stacked nFETs and pFETs containing suspended semiconductor channel material nanosheets (NS) and a method of forming such a structure. The structure is a three dimensional (3D) integration by vertically stacking nFETs and pFETs for area scaling. In an embodiment, vertically-stacked NS FET structures include a… (excerpt from the patent abstract)
| # | Patent | Citations |
|---|---|---|
| 1 | Metal gate of gate-all-around transistor | 141 |
| 2 | Sub-fin isolation schemes for gate-all-around tran… | 140 |
| 3 | Vertical gate-all-around field effect transistors … | 139 |
| 4 | Gate-all-around field-effect transistor devices ha… | 134 |
| 5 | Threshold voltage adjustment for a gate-all-around… | 131 |
| 6 | Semiconductor device and fabricating method thereof | 106 |
| 7 | Full air-gap spacers for gate-all-around nanosheet… | 99 |
| 8 | Multi-threshold voltage gate-all-around field-effe… | 97 |
Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.
What the structural data means for R&D investment decisions
The combination of high concentration, a plateau in annual activity, and distinct co-filing partnerships shapes the strategic calculus for anyone entering or expanding in GAA nanosheet technology.
Field is at or near maturity; annual volume has plateaued near the 2019 peak
Annual filings have plateaued near the 2019 peak of 154, consistent with a maturing technology cycle where foundational device structures are largely claimed and incremental refinements dominate new filings. Entrants face a dense prior-art landscape in core transistor architecture. Differentiation now depends on process integration details, novel materials combinations, and application-specific variants rather than first-mover structural claims.
Lifecycle: Maturity82% concentration among the top five of the hundred largest filers leaves limited open space in core routes
The top five filers hold 82% of the combined output among the hundred largest filers, a level that limits freedom to operate in the most-filed device and process classes. Smaller players and new entrants are most likely to find actionable space in adjacent application areas — memory integration, nanotechnology cross-applications — rather than in the dominant H01L transistor-structure cluster. Licensing exposure is high for anyone commercialising mainstream GAA process nodes.
High concentrationIBM–CEA, TSMC–National Taiwan University, and IMEC–KU Leuven are the active co-filing pairs
The most active co-filing relationships pair IBM with the French Atomic Energy Commission (CEA), TSMC with National Taiwan University, and IBM with its European subsidiaries (IBM Deutschland GmbH and IBM United Kingdom). IMEC co-files with both KU Leuven and Huawei, reflecting its role as a neutral research hub bridging academia and commercial players. These partnerships indicate that pre-competitive process research and exploratory device physics remain active collaboration vectors even as the overall field matures.
Ecosystem co-filingUS filing dominance; Europe and PCT routes are secondary but present
The United States is by far the primary filing jurisdiction. Europe (EPO) and WIPO (PCT) are secondary channels, followed by India. China, South Korea, and Taiwan each register only marginal coverage at the patent-record level. The US concentration reflects both the nationality of the dominant applicants and the strategic importance of US market protection. Companies seeking broad international protection would find current non-US coverage relatively thin, presenting both a risk (gaps in freedom-to-operate) and an opportunity for targeted foreign filing.
US-centricGo beyond the landscape: Eureka’s TRIZ Solution agent breaks down an R&D problem and returns patented concept solutions, each with a technical approach and cited patent & literature evidence.
| Applicant | Collaborator | Co-filings |
|---|---|---|
| International Business Machines Corporation (IBM) | French Alternative Energies and Atomic Energy Commission (CEA) | 6 |
| Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC) | National Taiwan University | 5 |
| International Business Machines Corporation (IBM) | IBM Deutschland GmbH | 5 |
| International Business Machines Corporation (IBM) | IBM United Kingdom Limited | 4 |
| Interuniversity Microelectronics Centre (IMEC) | KU Leuven (Katholieke Universiteit Leuven) | 3 |
| Interuniversity Microelectronics Centre (IMEC) | Huawei Technologies Co., Ltd. | 3 |
| Tokyo Electron Limited | Tokyo Electron US Holdings, Inc. | 1 |
Co-filing pairs, ranked by the number of jointly-filed patent families.
TSMC leads on volume; Intel and Qualcomm show the sharpest recent momentum
The leader and challenger positions reflect different strategic postures: TSMC’s scale reflects foundry-node competition while Intel’s recent acceleration signals a platform-catch-up push.
Taiwan Semiconductor Manufacturing Co. (TSMC)
TSMC holds the largest position in the ranking with 369 patent families, concentrated entirely across semiconductor device structure and process classes (H01L 29, H01L 21, H01L 27). Recent momentum shows a modest –6% trend versus the prior three-year window, consistent with the field’s overall plateau rather than a strategic retreat. As the world’s leading pure-play foundry, TSMC’s portfolio breadth across transistor structure, integration, and process suggests defensive coverage of its advanced node roadmap.
families: 369Intel Corporation
Intel ranks third overall with 125 patent families but is the standout momentum story among established players, recording a +138% trend in recent filings versus the prior three-year window. Its technology focus mirrors the dominant H01L classes, indicating core transistor-structure investment rather than peripheral application areas. This acceleration is consistent with Intel’s public commitment to reclaiming process-node leadership and suggests its GAA nanosheet IP base is being built out rapidly to support production-ready platforms.
families: 125| Applicant | Recent (3 yrs) | Trend |
|---|---|---|
| Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC) | 163 | ▼ -6% |
| International Business Machines Corporation (IBM) | 58 | ▼ -56% |
| Intel Corporation | 76 | ▲ +138% |
| Qualcomm Incorporated | 30 | ▲ +100% |
| Applied Materials, Inc. | 20 | ▲ +54% |
| Tokyo Electron Limited | 6 | ▲ new entrant |
| Samsung Electronics Co., Ltd. | 5 | ▲ new entrant |
| GlobalFoundries US Inc. | 8 | ▲ new entrant |
Memory integration and nanotechnology cross-application are the least-served adjacent branches
Against the dominant H01L transistor-structure cluster, several IPC branches appear relatively sparse despite plausible technical overlap with nanosheet channel architectures.
H10B · Memory device manufacture
H10B accounts for a small share of classifications in the corpus. Nanosheet channel geometries offer potential advantages for embedded non-volatile memory cells and SRAM bitcells within GAA process flows, yet structured IP coverage in this branch remains limited relative to the logic-transistor core. Entry requires process-integration expertise specific to memory arrays, but the technical path is well-defined and the competitive density in this adjacent branch is lower than in the H01L core.
Search this in Eureka →B82Y · Nanotechnology applications
B82Y covers nanotechnology cross-applications and is sparsely represented in this corpus. Nanosheet fabrication inherently involves sub-10 nm material control, making cross-disciplinary filings at the nanotechnology–semiconductor interface a natural extension — for example, nanomaterial characterisation, nano-scale metrology, or bio-sensor integration using GAA channel structures. The low filing density here suggests either that applicants are not yet classifying work under B82Y or that systematic exploration of these cross-applications has not yet begun at scale.
Search this in Eureka →How leaders differ by technology route across IPC branches
Route coverage across the main technology branches in the current evidence set.
| Player | H01L 29 · Semiconductor devices | H01L 21 · Semiconductor devices | H01L 27 · Semiconductor devices | H10D 62 · Semiconductor devices (general) | H10D 64 · Semiconductor devices (general) |
|---|---|---|---|---|---|
| Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC) | Strong · 374 | Strong · 281 | Strong · 192 | Moderate · 185 | Moderate · 184 |
| International Business Machines Corporation (IBM) | Strong · 312 | Strong · 216 | Moderate · 139 | Moderate · 147 | Moderate · 122 |
| Intel Corporation | Strong · 130 | Strong · 76 | Strong · 76 | Moderate · 57 | Moderate · 57 |
| Qualcomm Incorporated | Strong · 52 | Strong · 35 | Strong · 29 | Moderate · 12 | Moderate · 11 |
| Applied Materials, Inc. | Strong · 33 | Strong · 19 | Moderate · 12 | Moderate · 13 | Moderate · 13 |
| GlobalFoundries Inc. | Strong · 20 | Strong · 12 | Strong · 14 | Strong · 12 | Moderate · 8 |
| Tokyo Electron Limited | Strong · 20 | Strong · 15 | Strong · 11 | Absent | Absent |
Frequently asked questions
The corpus covers 963 patent families. This total spans the global nanosheet channel / gate-all-around transistor space as indexed in PatSnap Eureka. Filings from 2024 onward are subject to publication lag and will revise upward over time.
Taiwan Semiconductor Manufacturing Co. (TSMC) is the largest filer, holding the top position in the applicant ranking with 369 patent families. IBM follows as the second-largest filer with 289 patent families, and Intel ranks third with 125 patent families.
The top five filers — TSMC, IBM, Intel, Qualcomm, and GlobalFoundries — account for 82% of the combined output of the hundred largest filers. This is a high concentration level, indicating that the core IP landscape is controlled by a small number of organisations with deep semiconductor manufacturing or design capability.
Among established players, Intel shows the strongest momentum at +138% in recent filings versus the prior three-year window. Qualcomm is also accelerating at +100%, and Applied Materials at +54%. Tokyo Electron, Samsung Electronics, and GlobalFoundries US are each recorded as new entrants with no meaningful prior-period base.
Annual filings rose from 74 in 2017 to a peak of 154 in 2019, then plateaued in the 117–142 range through 2022. The lifecycle assessment places the field at or near maturity, with annual volume having eased from the 2019 peak. The 2025 and 2026 data points reflect publication lag, not a confirmed further decline.
The United States is overwhelmingly the dominant filing jurisdiction at the patent-record level. Europe (EPO) and WIPO (PCT) are secondary, followed at a distance by India. China, South Korea, and Taiwan each show very limited coverage, meaning freedom-to-operate analysis outside the US may reveal thinner prior-art density.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
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