Nanosheet FET TCAD (GAA) Patent Snapshot 2026
The nanosheet FET TCAD (gate-all-around) patent space is nascent, with 6 patent families spread across 7 applicants — all of whom entered within the last few years. No single player has established a commanding position, and the technology mix spans device physics, AI-assisted modeling, and digital simulation, signaling a field still defining its methodological boundaries.
Seven applicants share a nascent corpus, with no dominant leader yet
The evidence snapshot currently comprises 6 patent families distributed equally — at 1 patent family each — across all seven ranked applicants, including Vellore Institute of Technology Chennai, Intel Corporation, IMEC, Huawei Technologies, POSTECH, Shenyang Institute of Automation, and East. China Normal University.
The top five filers account for 71% of the ranked applicants visible in this query’ combined total, a high concentration figure that in this case reflects the small absolute corpus size rather than an entrenched oligopoly. There is effectively no tier gap between leader and challenger: all applicants hold an identical position.
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 1 | Vellore Institute of Technology Chennai | 1 | |
| 2 | Shenyang Institute of Automation, Chinese Academy of Sciences | 1 | |
| 3 | Intel Corporation | 1 | |
| 4 | East China Normal University | 1 | |
| 5 | IMEC (Interuniversitair Micro-Electronics Centrum) | 1 | |
| 6 | POSTECH Academy-Industry Foundation | 1 | |
| 7 | Huawei Technologies Co., Ltd. | 1 |
The parity among applicants implies that no organization has yet converted TCAD methodology for nanosheet FET or GAA devices into a protected, differentiated portfolio. This is characteristic of a technology in its earliest patent-filing phase, where exploratory activity precedes systematic IP strategy.
Filing counts for 2024 and beyond are subject to publication lag and are likely under-represented; the apparent drop after 2023 should not be read as a decline in research activity. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.
Activity emerged in 2022 and peaked in 2023; technology mix spans device modeling and AI
The filing trend and technology composition together reveal a field that ignited recently and is still establishing its visible technical approach. The two charts below capture both the timing of activity and the range of IPC classes being claimed.
Annual filing trend
No filings were recorded from 2017 through 2021. Activity began in 2022 with 2 patent families and reached its highest single-year count of 3 families in 2023. The 2024 figure of 1 family and zero counts in 2025–2026 reflect publication lag rather than a real slowdown; the window since 2022 represents the entirety of observed activity in this topic.
↗ Hover for values · click a bar to ask EurekaTechnology composition
Semiconductor device classes (H01L and H10D) are visible in, consistent with filings focused on device structure and fabrication modeling. Digital data processing (G06F) and AI-model computing (G06N) each appear, reflecting the simulation and machine-learning dimensions of TCAD work. Nanotechnology applications (B82Y) is the smallest branch, signaling that nano-scale characterization framing is used selectively alongside mainstream semiconductor classification.
↗ Hover for values · click a bar to ask EurekaHighly cited patent families surfaced by the query
Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.
Gate-all-around field-effect transistor with exten…
A gate-all-around field effect transistor with an extended source/drain and a method of manufacturing the same. The gate-all-around field effect transistor has an extended source/drain structure formed by partial etching of channels to solve unbalance between semiconductor devices and enables high speed operation through reduction in RC delay. (excerpt from the patent abstract)
| # | Patent | Citations |
|---|---|---|
| 1 | 抗辐照正方环栅MOSFET半导体器件建模方法 | 2 |
| 2 | 纳米片环栅场效应晶体管金属功函数波动电路仿真方法 | 1 |
Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.
Assignee snapshot from the current evidence set
The applicants below are visible in this query result. Because the evidence set is relatively small, read this section as a directional snapshot rather than a full competitive ranking.
Intel Corporation
Intel holds 1 patent family and entered the nanosheet FET TCAD space as a new entrant. Its technology focus spans three H01L sub-classes (H01L 21, H01L 27, H01L 29), covering process, circuit integration, and active device aspects — the broadest H01L coverage among all applicants, suggesting an intent to claim across the full TCAD modeling chain for GAA devices.
families: 1IMEC (Interuniversitair Micro-Electronics Centrum)
IMEC holds 1 patent family as a new entrant and is the only applicant with a B82Y 10 (nanotechnology applications) classification alongside H01L 21 and H01L 29, indicating a framing that explicitly links nano-scale physics to device simulation. IMEC is also the sole co-filer in the corpus, having collaborated with Huawei Technologies on its filing.
families: 1Frequently asked questions
The current corpus contains 6 patent families. This is a very small corpus, reflecting the novelty of applying formal TCAD simulation and modeling workflows specifically to nanosheet gate-all-around device architectures.
Seven applicants each hold 1 patent family: Vellore Institute of Technology Chennai, Shenyang Institute of Automation (Chinese Academy of Sciences), Intel Corporation, East China Normal University, IMEC, POSTECH Academy-Industry Foundation, and Huawei Technologies. No single applicant leads by volume.
No filings were recorded from 2017 through 2021. Activity began in 2022 with 2 patent families and reached 3 families in 2023. The data for 2024 onward is subject to publication lag and is likely under-counted.
China and Europe (EPO) each account for 2 patent records. The United States and India each have 1 patent record. No single jurisdiction is visible in this early-stage corpus.
One co-filing relationship is recorded: IMEC and Huawei Technologies jointly filed 1 patent family. No other co-applicant links are present in the evidence.
The visible branch is H01L (semiconductor devices), with 4 patent records. G06F (electric digital data processing) covers 2 records. B82Y (nanotechnology applications), G06N (computing based on AI models), and H10D (semiconductor devices, general) each appear in 1 record, reflecting device physics, simulation, AI modeling, and nano-scale framing dimensions of the field.
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Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
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