Nanosheet Gate Interface (GAA) Patent Landscape 2026
The nanosheet gate-all-around (GAA) interface field is in a growth phase, with Taiwan Semiconductor Manufacturing Co. (TSMC) holding a commanding lead across 42 patent families in scope. Annual filing volume has risen sharply over the multi-year window, with the United States firmly established as the primary filing jurisdiction.
TSMC leads a highly concentrated field with a dominant single-applicant position
TSMC ranks first with 31 patent families, placing it far ahead of every other filer. MediaTek comes second with 5 patent families, and Intel ranks third with 3, establishing a steep drop-off from the leader to the rest of the field.
The top five filers account for 91% of the combined total among the hundred largest filers, indicating exceptional concentration. The gap between TSMC and the second-ranked applicant is large enough that no near-term challenger is positioned to close it without a substantial shift in filing strategy.
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 1 | Taiwan Semiconductor Manufacturing Co., Ltd. | 31 | |
| 2 | MediaTek Inc. | 5 | |
| 3 | Intel Corporation | 3 | |
| 4 | KOREA ADVANCED INST OF SCI & TECH | 2 | |
| 5 | Institute of Microelectronics, Chinese Academy of Sciences | 1 | |
| 6 | International Business Machines Corporation | 1 | |
| 7 | Applied Materials, Inc. | 1 | |
| 8 | LG Electronics Inc. | 1 | |
| 9 | Marvell Asia Pte. Ltd. | 1 |
TSMC’s dominance implies that the manufacturing process-device integration path for GAA nanosheet gate interfaces is largely defined by a single foundry’s IP portfolio, creating both licensing dependencies and potential barriers to independent process development for competitors and fabless designers.
The most recent 18–24 months of filings are subject to publication lag and are likely under-counted; the 2025 and 2026 data points should be treated as provisional. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.
Filing activity accelerated from 2023 onward; semiconductor device classes dominate the technology mix
Annual filings remained modest from 2017 through 2022, then climbed sharply in 2023 and 2024, reflecting a transition from exploratory research to active commercialization-stage patenting. The technology class breakdown reveals a field centered on core semiconductor device structures, with a thin tail of adjacent branches.
Annual filing trend
Filings were sparse from 2017 to 2022, then jumped to 10 in 2023 and 12 in 2024, consistent with the lifecycle growth signal. The 2025 and 2026 values are understated due to publication lag and should not be read as a slowdown.
↗ Hover for values · click a bar to ask EurekaTechnology composition
H01L (Semiconductor devices) is the dominant class, followed by H10D (Semiconductor devices, general) and B82Y (Nanotechnology applications). Memory-related (H10B, G11C), coating (C23C), and crystal-growth (C30B) branches each account for only a small share of records, signaling limited coverage of peripheral process and application areas.
↗ Hover for values · click a bar to ask EurekaHighly cited patent families surfaced by the query
Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.
Nanosheet gate-all-around transistor and method of…
The present disclosure relates to a nanosheet gate-all-around transistor and a method of manufacturing a nanosheet gate-all-around transistor. The nanosheet gate-all-around transistor includes: a substrate having a shallow trench isolation structure on a surface of the substrate; a nanosheet stacking portion provided above the substrate, where the nanosheet… (excerpt from the patent abstract)
| # | Patent | Citations |
|---|---|---|
| 1 | CMOS implementation of germanium and III-V nanowir… | 67 |
| 2 | Gate structures for semiconductor devices | 27 |
| 3 | Gate-all-around metal-oxide-semiconductor transist… | 18 |
| 4 | Transistors with different threshold voltages | 12 |
| 5 | Gate structures for semiconductor devices | 7 |
| 6 | Gate structures for semiconductor devices | 6 |
| 7 | CMOS implementation of germanium and iii-v nanowir… | 6 |
| 8 | CMOS implementation of germanium and III-V nanowir… | 6 |
Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.
What the structure means for semiconductor R&D teams
The combination of a growth lifecycle, extreme concentration, and a US-centric filing geography shapes the competitive options available to new entrants and second-tier players in the GAA space.
Early growth phase with rising annual volume
The field is classified as Growth, with annual filings still rising and the most recent years understated by publication lag. The 86% recent-window growth rate indicates that patenting activity is accelerating, not plateauing. Teams entering now face a window that is open but narrowing as TSMC’s portfolio deepens.
Lifecycle: GrowthSingle-leader structure with a wide tier gap
The top five filers hold 91% of the combined total among the hundred largest filers, and TSMC alone accounts for 31 of the 42 patent families in scope. The gap between TSMC and the nearest rival (MediaTek, 5 patent families) is wide enough that challengers would need to build portfolios from near-zero bases to compete at the same breadth. Independent R&D programs should map freedom-to-operate carefully against TSMC’s H01L 29 and H01L 21 filings before committing resources.
High concentrationNo co-applicant activity detected in scope
Evidence for co-applicant collaboration is pending — no co-filing pairs appear in the current dataset. The field appears to be pursued through independent, proprietary development tracks rather than joint ventures or research consortia. This absence may reflect the competitive sensitivity of GAA process IP or the early stage of industry standardization efforts.
No co-filers detectedUS-centric filing with minimal EPO and China coverage
The United States leads with 43 patent records, Europe (EPO) has 2, and China has 1, reflecting a strong preference for US protection in this field. For companies manufacturing or selling into Asian or European markets, the thin coverage outside the US may represent either a gap in competitor strategies or an area where defensive filings could add value.
US-dominantGo beyond the landscape: Eureka’s TRIZ Solution agent breaks down an R&D problem and returns patented concept solutions, each with a technical approach and cited patent & literature evidence.
Co-filing pairs, ranked by the number of jointly-filed patent families.
TSMC leads by a wide margin; Intel and Marvell among newer entrants
The applicant momentum data shows several filers entering the field recently from a near-zero prior base. TSMC’s trajectory is particularly notable given both the size and recency of its filing activity.
Taiwan Semiconductor Manufacturing Co.
TSMC holds 31 patent families in scope, accounting for the large majority of the field. Its technology focus spans H01L 29, H01L 21, and H01L 27 — covering device structures, fabrication processes, and integrated circuit configurations. Momentum data marks TSMC as a new entrant in the recent window with 21 recent filings, indicating that its portfolio has been built rapidly and is still expanding.
patent families: 31Intel Corporation
Intel ranks third with 3 patent families in scope and is marked as a new entrant in the recent period with 2 recent filings. Its technology focus includes H01L 21, H01L 29, and B82Y 10 (nanotechnology applications), suggesting an orientation toward both device fabrication and nanoscale materials integration — a somewhat broader technical scope than the pure semiconductor-device framing of most other filers.
patent families: 3| Applicant | Recent (3 yrs) | Trend |
|---|---|---|
| Taiwan Semiconductor Manufacturing Co., Ltd. | 21 | ▲ new entrant |
| Intel Corporation | 2 | ▲ new entrant |
| Marvell Asia Pte. Ltd. | 1 | ▲ new entrant |
| International Business Machines Corporation | 1 | ▲ new entrant |
| Institute of Microelectronics, Chinese Academy of Sciences | 1 | ▲ new entrant |
Under-served branches adjacent to the core GAA device space
Several IPC classes appear at low coverage within the nanosheet GAA corpus, representing branches that are adjacent to the dominant H01L device focus but sparsely populated. These are observations of relative sparsity; whether they represent actionable entry points depends on technical fit and competitive context.
C23C · Coating & Surface Deposition
Only 1 patent record falls under C23C (Coating and surface deposition) in this corpus, despite atomic-layer deposition and related surface engineering being central to GAA gate dielectric formation. The sparse coverage here may reflect that process-chemistry patents are filed under semiconductor device classes rather than materials classes, or it may indicate an under-patented process layer. Teams developing novel high-k dielectric deposition or interface passivation chemistries for nanosheet gates could examine whether this branch offers a lower-density filing environment.
Search this in Eureka →H10B · Memory Device Manufacture
H10B (Memory device manufacture) has 3 patent records in this topic, representing 4% of records. GAA nanosheet architectures are increasingly relevant to embedded SRAM and next-generation memory cells, yet the intersection with H10B remains lightly patented. Filers working on GAA-based memory integration — particularly embedded cache or logic-compatible DRAM — may find this branch less contested than the core H01L device space.
Search this in Eureka →How leading applicants differ by IPC technology route
Route coverage across the main technology branches in the current evidence set.
| Player | H01L 29 · Semiconductor devices | H01L 21 · Semiconductor devices | H01L 27 · Semiconductor devices | H10D 30 · Semiconductor devices (general) | H10D 62 · Semiconductor devices (general) |
|---|---|---|---|---|---|
| Taiwan Semiconductor Manufacturing Co., Ltd. | Strong · 30 | Strong · 25 | Strong · 18 | Moderate · 14 | Moderate · 14 |
| Intel Corporation | Strong · 7 | Strong · 7 | Strong · 6 | Emerging · 1 | Emerging · 1 |
| Korea Advanced Institute of Science and Technology | Strong · 2 | Strong · 2 | Absent | Absent | Absent |
Frequently asked questions
The current evidence covers 42 patent families in scope for the nanosheet gate interface (GAA) topic.
Taiwan Semiconductor Manufacturing Co. (TSMC) leads with 31 patent families, far ahead of the second-ranked applicant, MediaTek, which holds 5 patent families.
Annual filings were sparse from 2017 through 2022, then accelerated to 10 in 2023 and 12 in 2024. The lifecycle is classified as Growth, with an 86% recent-window growth rate. The 2025 and 2026 figures are understated due to publication lag.
The United States leads with 43 patent records. Europe (EPO) has 2 and China has 1, making this a strongly US-centric filing landscape.
H01L (Semiconductor devices) is the dominant IPC class, followed by H10D (Semiconductor devices, general) and B82Y (Nanotechnology applications). Memory, coating, and crystal-growth classes each account for only a small fraction of records.
Yes. C23C (Coating and surface deposition) and H10B (Memory device manufacture) are adjacent branches with very low record counts — 1 and 3 respectively — despite having plausible technical relevance to GAA process engineering and memory integration. These are observations of sparsity rather than confirmed commercial opportunities.
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Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
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