Nanosheet HVM (GAA) Patent Snapshot 2026
The nanosheet gate-all-around high-volume manufacturing space is highly concentrated: four applicants account for the entire top-100 ranking, with TSMC holding the largest single position. Activity has plateaued near its 2021 peak, signalling a field entering maturity rather than early-stage growth.
TSMC leads a tight four-player field
TSMC sits at the top of the applicant ranking, followed by Applied Materials, Tokyo Electron, and IBM — a compact group that together represent the entirety of the top-100 ranked filers in this space.
The top five filers account for 100% of the combined total among the ranked applicants visible in this query, indicating an extremely concentrated visible assignee structure with no meaningful long-tail of secondary applicants.
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 1 | Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC) | 11 | |
| 2 | Applied Materials, Inc. | 7 | |
| 3 | Tokyo Electron Ltd. | 5 | |
| 4 | IBM (International Business Machines Corporation) | 4 |
TSMC’s position as the leading integrated device manufacturer, alongside the presence of three major equipment and process-technology suppliers, suggests the patent evidence snapshot mirrors the foundry-ecosystem structure of real-world GAA manufacturing.
Patent publication typically lags filing by 18–24 months, so counts for 2024–2025 are likely understated and should not be read as a slowdown. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.
Activity plateaued after a 2021 peak; semiconductor device classes dominate
The annual filing trend and technology-class breakdown together show a field that has settled into a mature cadence after its 2021 surge, with technology coverage anchored almost entirely in core semiconductor device classes.
Annual filing trend
Filings rose from 2017, peaked at six families in 2021, and have since hovered at a lower plateau. Years 2024–2025 are subject to publication lag and will grow as pending applications publish — the apparent dip should not be interpreted as a true decline.
↗ Hover for values · click a bar to ask EurekaTechnology composition
H01L (Semiconductor devices) covers the entire corpus, with H10D (Semiconductor devices, general) appearing in most families. Nanotechnology applications (B82Y) and Coating & surface deposition (C23C) each appear in only a handful of families, pointing to a field that is predominantly device-architecture rather than materials- or process-chemistry-focused.
↗ Hover for values · click a bar to ask EurekaHighly cited patent families surfaced by the query
Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.
Self-aligned hybrid substrate stacked gate-all-aro…
A semiconductor structure including vertically stacked nFETs and pFETs containing suspended semiconductor channel material nanosheets (NS) and a method of forming such a structure. The structure is a three dimensional (3D) integration by vertically stacking nFETs and pFETs for area scaling. In an embodiment, vertically-stacked NS FET structures include a… (excerpt from the patent abstract)
| # | Patent | Citations |
|---|---|---|
| 1 | Inner spacers for gate-all-around semiconductor de… | 28 |
| 2 | Method of forming gate spacer for nanowire FET dev… | 22 |
| 3 | Self-aligned hybrid substrate stacked gate-all-aro… | 20 |
| 4 | Process integration to reduce contact resistance i… | 16 |
| 5 | Inner spacers for gate-all-around semiconductor de… | 14 |
| 6 | Method of forming gate spacer for nanowire FET dev… | 12 |
| 7 | Method to reduce parasitic resistance for CFET dev… | 9 |
| 8 | Semiconductor device and methods of formation | 5 |
Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.
Assignee snapshot from the current evidence set
The applicants below are visible in this query result. Because the evidence set is relatively small, read this section as a directional snapshot rather than a full competitive ranking.
Taiwan Semiconductor Manufacturing Co.
TSMC holds 11 patent families — the largest single position in this corpus — focused across H01L 21 (semiconductor device fabrication), H10D 30, and H10D 62. Momentum data classifies TSMC as a new entrant in the most recent window with 5 recent families, indicating the company began filing in this specific sub-space relatively recently despite its overall foundry leadership.
families: 11Applied Materials Inc.
Applied Materials holds 7 patent families, concentrated in H01L 21 and H10D 30, with additional coverage in H01L 29 (semiconductor device structures). Like TSMC, its momentum is classified as a new entrant with 5 recent families, suggesting active and ongoing filing. As the leading deposition and etch equipment supplier, its IP focus on device fabrication process steps is consistent with its commercial role in GAA manufacturing.
families: 7Frequently asked questions
The corpus in scope contains 27 patent families. This is a highly focused, specialist body of IP rather than a broad platform technology corpus.
Taiwan Semiconductor Manufacturing Co. (TSMC) is the top-ranked applicant with 11 patent families, ahead of Applied Materials (7), Tokyo Electron (5), and IBM (4).
The field is classified as Maturity, with annual filings having plateaued near the 2021 peak. The multi-year window shows 10% growth, but the pace of accumulation has eased. Recent years (2024–2025) are likely undercounted due to publication lag.
The United States is the visible filing jurisdiction, followed by WIPO PCT routes and Taiwan. The limited PCT footprint suggests that broad multi-jurisdiction protection strategies are not yet widespread in this corpus.
The most-cited patents in the corpus cover inner spacers for gate-all-around devices, gate spacer formation for nanowire FETs, self-aligned hybrid substrate stacked GAA structures, and contact resistance reduction — the core process-integration challenges of GAA HVM.
The collaboration evidence shows no co-filed patent families in this corpus. Each of the four ranked applicants appears to be developing GAA nanosheet HVM IP independently.
Built on Patsnap Open Platform
This report’s underlying patent dataset — filings, assignees, technology clusters — is open for developers via MCP and REST API. Free to start, 10,000 credits, no credit card required.
Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.