Nanosheet Transistor Reliability Patent Landscape 2026
- Filing has already peaked. 2023 was the high point at 17 families; the following years show fewer filings, not a ramp — this is a maturing claim set, not an emerging one.
- One company owns the reliability core. US10332803B1, the most-cited record in the set at 92 citations, sits well ahead of the next-most-cited filing, meaning the foundational hybrid-GAA structure claim is concentrated rather than contested.
- Almost nobody is filing jointly. Only two co-assignee pairs appear across 57 families, so reliability IP here is built in-house rather than through joint development agreements — a contrast worth noting before pursuing a partnership route.
Filing growth compares 2021 (9 records) with 2024 (5) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field.
What this landscape covers
This landscape tracks patent families at the intersection of nanosheet and gate-all-around (GAA) transistor architectures and the reliability failure modes that determine whether they survive in production: bias temperature instability, time-dependent dielectric breakdown (TDDB), and self-heating. It excludes general GAA process patents that do not make a reliability claim, and general reliability patents that do not name a nanosheet or GAA structure.
57 published families sit inside the window, concentrated overwhelmingly in United States filings, with a much smaller tail of European, Indian and PCT filings. Publication lags filing by roughly 18 months, so the 2025-2026 counts in the trend chart are undercounts, not a real drop-off — the true picture only firms up once those applications clear examination.
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Filing trend and technology composition
Two views of the same 57 families: when the claims were filed, and which IPC subclasses they sit in.
Filing trend: rise, peak, plateau
Filings moved from 2 in 2017 to a peak of 17 in 2023, with 2022 sitting at the midpoint of 6. That trajectory — flat early years, a sharp run-up, then a fall — reads as a claim space that got crowded fast around 2022-2023 and has since cooled, rather than one still accelerating into 2026.
IPC composition: reliability sits inside structure claims
All 57 families carry H01L, the core semiconductor-device classification, and 30 also carry H10D, the newer general semiconductor-device subclass — together these dominate the set. B82Y (nanotechnology), G06N (AI-based computing) and H10B (memory manufacture) each appear once or twice, showing that nanosheet reliability claims are still filed as device-structure patents first; cross-over into AI-assisted design or memory-specific reliability is marginal so far.
Shares are the percentage of the 57 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on Nanosheet Transistor Reliability with Eureka
This page is one run against one query. Ask Eureka your own question about nanosheet transistor reliability and every answer comes back with the patent numbers behind it.
Try EurekaThe most-cited reliability filings
Gate-all-around devices having self-aligned capping between channel and backside power rail (US11670692B2)
A semiconductor device includes power rails in a first interconnect structure on a backside of the device, a gate-all-around transistor with multiple channel layers stacked over that interconnect structure, a gate stack wrapping each channel layer except the bottommost, and a source/drain feature adjoining the channels. A conductive via connects the interconnect structure to the source/drain feature, and a dielectric feature isolates the bottommost channel layer from the backside power delivery path.Filed by Taiwan Semiconductor Manufacturing Co., Ltd., granted 2023-06-06 — this is the backside-power-rail variant of the same family topic that produced the set's second most-cited record, US20210359091A1.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US10332803B1 | Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of forming | 92 |
| 2 | US20170323949A1 | Protection of high-k dielectric during reliability anneal on nanosheet structures | 51 |
| 3 | US20200357931A1 | Nanosheet transistor having abrupt junctions between the channel nanosheets and the source/drain extension re… | 35 |
| 4 | US20210359091A1 | Gate-all-around devices having self-aligned capping between channel and backside power rail | 31 |
| 5 | US20220165731A1 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | 20 |
| 6 | US20210118884A1 | Structure and Method for Gate-All-Around Metal-Oxide-Semiconductor Devices With Improved Channel Configuratio… | 12 |
| 7 | US20220384434A1 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | 7 |
| 8 | US20220123123A1 | Formation of gate all around device | 6 |
| 9 | US11450664B2 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | 6 |
| 10 | US20230154996A1 | Nanosheet replacement metal gate patterning scheme | 5 |
Citation counts favour older filings simply because they have had longer to accumulate citations inside this corpus — read them as a signal of influence on subsequent filers, not as a ranking of current technical importance.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Browse MCP servers →What the numbers mean for a filing decision
Four read-throughs of the trend, composition and citation data above, translated into what they imply for where to file next.
The claim rush already happened
Filings rose from 2 in 2017 to a peak of 17 in 2023, then eased off. A new entrant filing now is filing into a claim space that has already been picked over by the leaders who moved in 2022-2023, not into a green field.
One structure claim anchors the field
US10332803B1's hybrid-GAA structure claim carries far more citations than any other record in the set, with the next-highest at 51. Anyone designing a hybrid gate-all-around structure with reliability claims should clear this filing first.
This is overwhelmingly a US filing story
Germany, EPO, India and WIPO together account for a small fraction of the set. A defensive filer focused only on US risk is covering most, but not all, of the exposure — European and Indian filings are thin enough that a single overlooked family there is easy to miss.
Reliability IP is built solo
Only two co-assignee pairings appear in the entire set, the strongest being an inter-university microelectronics centre paired with a research university. Nearly all other reliability claims were filed by a single assignee, suggesting this work is done inside one R&D organisation rather than through joint ventures.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to nanosheet transistor reliability, with the prior art for and against each one.
| Assignee | Co-assignee | Shared families |
|---|---|---|
| Interuniversity Microelectronics Centre (imec) | Katholieke Universiteit Leuven (KU Leuven) | 2 |
| International Business Machines Corporation (IBM) | IBM DEUTSCHLAND GMBH | 1 |
With only two co-assignee pairs in 57 families, most reliability claims in this set were filed by a single organisation working alone.
Who holds the ground, and who has stopped moving
Recent-year momentum tells a different story from historical share: several of the largest historical filers show zero filings in the latest year, while a smaller institute is still active.
Vellore Institute of Technology
The only assignee in this set with any recorded filing in the latest year, at 0% YoY — a signal that its filing pace has held steady rather than accelerated, but it has not stopped either.
Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC) (TSMC)
TSMC's US11670692B2 backside-power-rail record is one of the set's better-known filings, but the assignee shows zero filings in the latest year in this dataset — consistent with the broader post-2023 slowdown, not a company-specific retreat.
International Business Machines Corporation (IBM) (IBM)
IBM's sole recorded co-assignee pairing in this set is with IBM Deutschland GmbH, its own German subsidiary, rather than an external partner. Like the other large incumbents tracked here, its latest-year filing count is zero.
Interuniversity Microelectronics Centre (imec) + Katholieke Universiteit Leuven (KU Leuven) (imec + KU Leuven)
The strongest co-assignee link in the dataset, at two shared filings, pairs a Belgian inter-university microelectronics research centre with its host university — a research-institute model rather than a commercial joint venture.
| Assignee | Recent year | YoY |
|---|---|---|
| VELLORE INSITUTE OF TECH | 1 | 0% |
| Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC) | 0 | — |
| International Business Machines Corporation (IBM) | 0 | — |
| Qualcomm Incorporated | 0 | — |
| Intel Corporation | 0 | — |
| Interuniversity Microelectronics Centre (imec) | 0 | — |
| Katholieke Universiteit Leuven (KU Leuven) | 0 | — |
| GlobalFoundries U.S. Inc. | 0 | — |
Where to take this from here
The landscape data points to specific next steps rather than a general conclusion.
Clear the hybrid-GAA structure claim first
Before filing any hybrid gate-all-around reliability claim, check exposure against US10332803B1 — its 92 citations make it the anchor prior art for this entire set.
Run a freedom-to-operate check in Eureka →Watch the backside-power-rail cluster
US20210359091A1 and US11670692B2 both sit on the backside power delivery variant of GAA reliability claims; this sub-cluster is where the set's second- and later-cited records concentrate.
Explore the citation network in Eureka →Treat 2025-2026 counts as provisional
Publication lag means the apparent decline after 2023 is partly a reporting artefact. Re-run this trend query in twelve months before concluding the field has genuinely contracted.
Set a monitoring alert in Eureka →Questions practitioners ask about this landscape
In this landscape it means a filing that claims both a nanosheet or gate-all-around (GAA) transistor structure and a reliability failure mode such as bias temperature instability, time-dependent dielectric breakdown, or self-heating. A pure process patent for building a GAA transistor without a reliability claim is excluded, as is a general reliability patent that does not name the nanosheet or GAA structure. The search combines TA (title/abstract) terms for the structure with TACD (title/abstract/claims/description) terms for the failure mode, cross-checked against IPC codes H01L29/775, H01L22 and H01L29/78.
The peak of 17 families in 2023 is real, but the apparent drop in 2024-2026 is partly an artefact of publication lag: patent applications typically publish about 18 months after filing, so the most recent one to two years in any trend chart are always undercounted. The safest reading is that the field grew fast through 2022-2023 and has since plateaued or is cooling, but the exact 2025-2026 figures will keep rising for months as more applications clear publication.
By citation count, the strongest single record is US10332803B1, a hybrid gate-all-around FET structure and formation method cited 92 times within this corpus — well ahead of the next record at 51 citations. By recent activity rather than historical citation, however, the picture shifts: several of the largest historical filers, including TSMC and IBM, show zero filings in the latest year, while Vellore Institute of Technology is the only assignee with a recorded filing in that period.
Yes, in specific sub-areas rather than the field broadly. The IPC composition shows almost all activity sitting in core semiconductor-device classifications (H01L, H10D), with only one or two filings touching AI-assisted reliability screening (G06N) or memory-integrated nanosheet reliability (H10B) — both are thin enough to be worth a fresh claim rather than a design-around. Backside-via TDDB and inner-spacer BTI under negative bias also show low filing density relative to the dominant hybrid-GAA and backside-power-rail clusters.
Heavily concentrated in the United States: 43 of the 57 families in this set have a US receiving office, compared with single-digit counts for Germany, the EPO, India, WIPO/PCT filings and the Philippines. This means most of the enforceable reliability IP risk in this specific technical intersection sits in US law, though the small non-US tail should not be ignored since a single overlooked European or Indian family can still block regional commercialisation.
Rarely, based on this dataset. Only two co-assignee pairs appear across the full set of 57 families: the strongest links imec (Interuniversity Microelectronics Centre (imec)) with KU Leuven (Katholieke Universiteit Leuven (KU Leuven)) on two shared filings, and IBM with its own German subsidiary, IBM Deutschland GmbH, on one. The near-total absence of cross-company joint filings suggests reliability IP in this space is developed inside single R&D organisations rather than through joint ventures or shared research consortia.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.