Packet Delay Variation Patents: Leaders, Trends & White Space 2026
A patent landscape review of packet delay variation compensation and clock recovery filings across 105 records, covering leading assignees, IPC composition, filing trends and open claim space through 2026.
Filing growth = 2021 (2 records) → 2024 (0); 2024 is the last year we treat as complete. Top-5 share = the 5 largest assignees ÷ all 105 records in scope (CR5), not the ranked leaders only.
What packet delay variation compensation patents actually cover
Packet delay variation — jitter introduced as packets cross a switched network — degrades any service that depends on a shared time base: mobile fronthaul, precision time protocol (PTP) distribution, and synchronous video or broadcast delivery all suffer when timestamps drift. The patent activity in this dataset clusters around three practical problems: estimating and filtering jitter at the receiving clock, compensating for asymmetric processing delay between two directions of a link, and recovering a stable clock signal from timestamps carried inside the data packets themselves. These are not abstract signal-processing exercises; they map directly onto radio base station interfaces, PTP boundary clocks and video distribution nodes that vendors ship today.
The 105 records in scope span filings from 2015 through the 2026 cutoff, with the IPC composition showing this is fundamentally a network-transmission problem (H04J, H04L) that increasingly touches wireless (H04W) and even software/processing (G06F) as synchronization logic moves off dedicated clock hardware and into general-purpose stacks.
Filing trend and technology composition
The counts below come directly from the 105 records in scope and the IPC subclasses attached to them; a single record can carry several classes, so the class shares add up to more than the record total.
Filing trend: a 2020 peak, then a sharp pullback
Filings rose from 2 in 2017 to a peak of 8 in 2020, then fell across the following complete years — the 2021-to-2024 span shows a -100% swing. Because publication lags filing by roughly 18 months, the 2025 and 2026 figures are still filling in and should not be read as confirmation the field is dead; they simply are not complete yet.
Publication lags filing by roughly 18 months, so 2025 onwards are still filling in. Growth rates on this page therefore end at 2024; running them to the last bar would understate the field.
Technology composition: transmission-layer classes dominate
H04J (multiplex communication) and H04L (digital information transmission) each cover 57.1% of the 105 records, confirming that most claimed inventions sit in the packet-transport layer. G06F appears in 21.9% of records, showing a meaningful minority of claims implemented as processing/software logic rather than dedicated timing hardware; H04W (15.2%) and G04G (13.3%) mark the wireless and clock-device edges of the same problem.
Shares are the percentage of the 105 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
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Try EurekaThe most-cited prior art and a representative claim
US9608752B2 — Transporting RBS interface information with residence-time compensation
Systems and methods of transporting internal radio base station (RBS) interface information over a packet network are presented. In one exemplary embodiment, in an interworking function (IWF) for communicating packets between a radio equipment (RE) and a radio equipment controller (REC) of a radio base station (RBS), a method may include receiving a packet sent from another IWF and having internal RBS interface information and residence time measurement (RTM) information that characterizes an asymmetry between processing times on links in different directions between the RE and the REC. Further, the method may include determining an asymmetry compensation that compensates for the asymmetry uFiled by Ericsson; issued 2017-03-28. Abstract truncated as supplied in the underlying record.


| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US20080152035A1 | Digital broadcasting system and method of processing data | 69 |
| 2 | US20080049743A1 | Enhanced clock control in packet networks | 51 |
| 3 | US20080240065A1 | Digital broadcasting system and method of processing data | 48 |
| 4 | US20100020829A1 | Method for clock recovery using updated timestamps | 44 |
| 5 | WO2008051123A1 | Method for clock recovery using updated timestamps | 35 |
| 6 | US20030086372A1 | Automatic adjustment of buffer depth for the correction of packet delay variation | 34 |
| 7 | US6757292B2 | Automatic adjustment of buffer depth for the correction of packet delay variation | 25 |
| 8 | US20100027567A1 | Jitter buffer control method and communication apparatus | 19 |
| 9 | WO2008103170A1 | Assisted wall-clock | 18 |
| 10 | US20150163154A1 | Method and devices for packet selection | 17 |
Citation counts favour older records simply because they have had longer to accumulate citations inside this corpus — treat them as a signal of influence on later filings, not as evidence of current commercial relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Browse MCP servers →What the concentration and class data mean for filing strategy
Three patterns in the 105-record dataset matter more than any single ranking: how tightly ownership is concentrated, where the technology classes cluster, and how the co-filing pairs reveal joint development rather than competition.
Ownership sits with a small group, not a long tail
The top 5 assignees combined hold 51.4% of all 105 records in scope, and the top 10 extend that to 82.9%. A field this concentrated is not one where a newcomer can quietly file around the edges — the leading assignee alone accounts for 17 records, more than three times the fifth-place count of 7.
Activity peaked in 2020 and has cooled since
Filings climbed from 2 in 2017 to a peak of 8 in 2020, then declined through the last complete filing year, with 2021-to-2024 showing a full -100% swing. Because publication lags filing by around 18 months, 2025-2026 figures are still incomplete and should not be read as the field ending.
Transmission-layer claims dominate over dedicated clock hardware
H04J and H04L each appear on 57.1% of the 105 records, while G04G (dedicated clock/watch hardware) appears on only 13.3%. That gap indicates most inventive activity is happening in how jitter is handled inside the network stack, not in purpose-built timing chips.
A small cluster of joint R&D ties, led by a telecom-operator/research pairing
Ten co-assignee pairs appear in the dataset, with the strongest tie linking a national telecom operator, a UK telecom operator and a university research institute across two of the three strongest pairings. This points to applied research partnerships rather than open competition on those specific claims.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to network timing & synchronization: packet delay variation compensation patent landscape, with the prior art for and against each one.
Where to take this analysis
The ranking and class data point to specific next steps depending on whether you are clearing a product, scouting acquisition targets, or deciding where to file.
Map claims against your own product architecture
Cross-reference the H04J/H04L-heavy claim set against your own residence-time and clock-recovery implementation before committing to a design; the transmission-layer concentration means overlap risk is higher there than in dedicated hardware.
Run a freedom-to-operate check in EurekaWatch the co-filing cluster for signals
The strongest co-assignee pairings suggest active joint development between an operator and a research institute; monitoring their continuation filings can flag where the next claim wave lands before it publishes broadly.
Track assignee activity in EurekaRevisit the 2025-2026 filings once they mature
Publication lag means the apparent 2021-2024 decline is not the final word; re-run this landscape in a future quarter once the most recent two years of filings have had time to publish.
Set a landscape refresh in EurekaFrequently asked questions
Ownership in this 105-record dataset is concentrated: the leading assignee alone holds 17 records, and the top 5 assignees combined account for 51.4% of all records in scope. The top 10 extend that to 82.9%, leaving a long tail of single- or few-filing entrants below that line. This means a freedom-to-operate review should prioritise the handful of leaders before spending time on the tail.
Filing activity peaked at 8 records in 2020 and declined through the last complete filing year, with the 2021-to-2024 span showing a -100% change. However, publication lags filing by roughly 18 months, so the 2025 and 2026 counts in any dataset are structurally incomplete and understate real activity. Treat the recent cooling as a data artefact until at least one more full publication cycle has passed.
Most claims sit in the network-transmission layer: H04J (multiplex communication) and H04L (digital information transmission) each appear on 57.1% of the 105 records. A smaller but meaningful share, 21.9%, is classified under G06F, indicating jitter compensation increasingly runs as software logic rather than dedicated hardware. Wireless-network classification (H04W, 15.2%) and dedicated clock hardware (G04G, 13.3%) mark the边缘 of the same core problem — expressed here in English as the wireless and clock-hardware edges.
US9608752B2, assigned to Ericsson and issued in 2017, covers a method for transporting internal radio base station interface information over a packet network while compensating for asymmetric processing delay between the two link directions using residence-time measurement data. It is directed at the interworking function between radio equipment and its controller in mobile fronthaul deployments. Anyone implementing residence-time-based asymmetry compensation in a similar RBS interworking context should review this claim scope closely before finalising an implementation.
The IPC composition shows a strong tilt toward H04J/H04L transmission claims (57.1% each) and comparatively little coverage in G08B signalling/alarm systems (1.0%) or H04H broadcast communication (1.9%). That gap suggests under-claimed territory in applying jitter-compensation techniques to alarm/signalling contexts and to broadcast-specific timing recovery, both of which see far less patent density than the core transmission classes.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.