Photonic Neural Network Accelerators 2026 | PatSnap Eureka
Integrated Photonic Neural Network Accelerators
Photonic accelerators exploit MZI meshes, MRR weight banks, and WDM parallelism to execute neural network MACs at sub-picojoule energy efficiencies. This dataset spans 14 identified patent assignees and 36 records from 2012 to 2026.
Light-Speed Matrix Compute: How Photonic NNs Work
Integrated photonic neural network accelerators exploit high bandwidth, low propagation latency, and wavelength-division multiplexing to execute dense matrix-vector multiplications that dominate neural network computation. Three principal substrates appear in this dataset: silicon photonics on SOI for CMOS foundry compatibility, indium phosphide for active gain elements, and emerging platforms including thin-film lithium niobate and silicon nitride.
The central computational primitive is the optical multiply-accumulate unit, implemented via Mach-Zehnder interferometer meshes, microring resonator weight banks, or broadcast-and-weight photonic cross-connect fabrics. CrossLight demonstrated 9.5× lower energy-per-bit versus prior photonic deep learning accelerators through multi-level cross-layer optimization spanning device engineering, circuit tuning, and architectural design.
Beyond coherent matrix processors, the dataset documents spiking neural network paradigms enabled by VCSEL-based photonic neurons and reservoir computing on silicon chips. SONIC achieved 5.8× better performance-per-watt over electronic sparse accelerators through sparsity-aware hardware-software co-design. A 49-wavelength Kerr microcomb-mapped single photonic perceptron reached 95.2 Gbps single-neuron throughput.
Patent filings in this dataset are concentrated among Chinese institutional assignees, with Zhejiang Lab holding 4 active CN patents — the largest single-assignee cluster in retrieved records. The most recent filings (2026) include a Sony image-sensor-integrated parallel neural network accelerator and a compiler-directed photonic tensor-core booster from JIS College of Engineering, in retrieved records.
Filing Clusters, Technology Approaches & Timeline
The retrieved records span four principal technology clusters — coherent MZI/MRR processors, incoherent WDM broadcast-and-weight, neuromorphic VCSEL spiking networks, and hybrid electronic-photonic co-integration — with a clear temporal shift toward compiler-hardware co-design and sensor-fused edge inference in 2024–2026.
Patent Records by Technology Cluster (Dataset Snapshot)
Coherent MZI/MRR matrix processors represent the largest cluster in this dataset with 4 key identified records, followed by incoherent WDM architectures, neuromorphic VCSEL approaches, and hybrid co-integration designs.
↗ Click bars to exploreFiling Activity Timeline — Photonic Neural Network Accelerators (Dataset Snapshot)
Filing and publication activity in this dataset accelerated sharply in 2021–2023, with the earliest foundational records from 2012–2014 and the most recent 2026 filings marking sensor-fused edge inference and compiler-directed tensor cores.
↗ Click bars to exploreWhere Photonic Neural Network Accelerators Are Being Deployed
Retrieved records span five deployment domains: data center AI inference, edge and IoT embedded intelligence, high-energy physics scientific computing, medical imaging and biomedical sensing, and telecommunications signal processing. Each domain presents distinct photonic architecture requirements.
Data Center AI Inference
CrossLight, SONIC, and Intel’s heterogeneous PIC+EIC accelerator are explicitly positioned for data center-grade AI workloads requiring high throughput per watt. SONIC achieved 5.8× better performance-per-watt over electronic sparse accelerators. Photonics for artificial intelligence and neuromorphic computing (2021) frames data center inference as the primary commercialization target.
High-Performance ComputingEdge AI and IoT Embedded Systems
Zhejiang Lab’s 4 CN patents (2022) target photonic CNN convolution accelerator chips for machine vision, autonomous driving, and NLP. China Aviation Industry Corporation Luoyang Electro-Optical Equipment Research Institute filed a 2023 CN patent on an embedded platform integrating CPU, FPGA, and NPU for real-time aerospace intelligence. Sony Semiconductor Solutions’ 2026 WO patent places programmable neural network processing units directly behind image sensor pixel arrays for always-on edge inference.
Embedded IntelligenceHigh-Energy Physics Detectors
Central China Normal University filed 2 active CN patents (2024) describing radiation-hardened, low-latency CNN inference accelerator chips for particle detector front-ends at colliders. The designs deploy streaming pipeline architectures tolerant of radiation in CERN-scale environments and incorporate fine-grained compression and quantization resilient to radiation-induced soft errors.
Scientific ComputingMedical Imaging and Biomedical Sensing
Brown University holds 1 active US patent (2025) and 1 WO filing (2023) on a compact optoelectronic device integrating a near-infrared VCSEL array, dynamic vision sensor, and chip-scale neuromorphic computing platform for real-time noninvasive tissue imaging. This demonstrates convergence of photonic neural processing with medical diagnostics at the chip level.
Medical DevicesLeading Assignees in Photonic Neural Network Accelerators — Dataset Snapshot
Among the 14 patent assignees identified in retrieved records, Chinese institutional filers account for the majority of active grants in this dataset. Zhejiang Lab holds 4 active CN patents — the single largest filing cluster in retrieved records — while Central China Normal University, Brown University, and Intel Corporation each represent distinct geographic and technology strategies.
Top Assignees by Patent Filing Count — Photonic Neural Network Accelerators (Dataset Snapshot)
↗ Click bars to exploreZhejiang Lab (之江实验室)
Zhejiang Lab holds 4 active CN patents filed in 2022, representing the largest single-assignee cluster in this dataset. The filings cover photonic convolutional neural network accelerator chips and time-wavelength interleaved photonic neural network chips targeting machine vision, autonomous driving, and natural language processing. All four patents are active and reflect a coherent, application-specific institutional filing strategy in CN jurisdiction.
China — CNCentral China Normal University
Central China Normal University (华中师范大学) filed 2 active CN patents in 2024 on radiation-hardened, low-latency CNN inference accelerator chips designed for particle detector front-ends at collider-scale scientific instruments. The patents deploy streaming pipeline architectures and fine-grained compression and quantization techniques resilient to radiation-induced soft errors in CERN-scale environments. Both filings are active in CN jurisdiction.
China — CNFour Converging Frontiers in Photonic Neural Compute
The most recent records (2024–2026) in this dataset point to compiler-hardware co-design for reconfigurable tensor cores, sensor-fused neuromorphic inference at the pixel level, photonic NPU embedded processing with electromagnetic bus architectures, and radiation-hard photonic-adjacent inference for scientific instruments.
Compiler-Hardware Co-Design for Photonic Tensor Cores
The 2026 filing from JIS College of Engineering (IN) describes a domain-specific compiler that generates reconfiguration bytecode mapping sparse ML computation graphs onto photonic mesh patches in real time. This compiler-directed waveguide conversion approach enables software-defined photonic AI acceleration with thermo-optic and electro-optic switch reconfiguration before each neural network layer. It represents a significant step toward programmable, layer-adaptive photonic inference engines.
Sensor-Fused Neuromorphic Inference at the Pixel Level
Sony Semiconductor Solutions’ 2026 WO patent places programmable neural network processing units directly behind the image sensor pixel array, eliminating off-chip data transport for vision inference. This architecture represents direct convergence of photonic sensing and compute, targeting always-on edge inference applications. Brown University’s 2025 US patent similarly integrates a near-infrared VCSEL array and dynamic vision sensor with chip-scale neuromorphic computing for real-time noninvasive tissue imaging.
Coherent MZI/MRR vs. Incoherent WDM Broadcast-and-Weight
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| Dimension | Coherent MZI/MRR | Incoherent WDM Broadcast-and-Weight |
|---|---|---|
| Primary Platform | Silicon-on-insulator (SOI) SiPh; Si₃N₄ | Indium Phosphide (InP) monolithic; also SOI |
| Weight Encoding | Phase-shift via thermo-optic or electro-optic tuning of MZI mesh or MRR | Optical attenuation across WDM channels; intensity modulation |
| Key Performance Metric | 9.5× energy-per-bit reduction (CrossLight, 2021); 5.8× performance-per-watt (SONIC, 2022) | >25 dB dynamic range (InP cross-connect, 2020); 36 dB power dynamic range (InP multi-layer, 2022) |
| Nonlinear Activation | Electronic or all-optical via TFLN ReLU (2022 demonstration) | SOA-based cross-gain modulation as nonlinear activation in InP |
| Phase Sensitivity | High — thermal crosstalk and fabrication phase errors are primary barriers | Lower — avoids phase sensitivity by using intensity encoding |
| Scalability | Pruning via lottery-ticket hypothesis; SVD-based coherent network footprint reduction | Scaling to 64 inputs demonstrated; soliton microcomb supports 49 wavelength channels |
| On-Chip Training | Direct feedback alignment on SiPh achieving sub-picojoule-per-MAC (2022) | Not demonstrated in retrieved records |
| Key Assignees / Works | CrossLight (2021); SONIC (2022); Intel US patent (2021); JIS College of Engineering IN (2026) | TU Eindhoven / imec ecosystem literature; InP cross-connect (2020, 2022) |
Frequently Asked Questions: Photonic Neural Network Accelerators
CrossLight reports a 9.5× lower energy-per-bit versus prior photonic deep learning accelerators, achieved through multi-level cross-layer optimization spanning device engineering, circuit tuning, and architectural design.
Three principal substrates appear in the dataset: silicon photonics on silicon-on-insulator (SOI) for CMOS foundry compatibility, indium phosphide (InP) for active gain elements and ultracompact nonlinear functions, and emerging platforms including thin-film lithium niobate (TFLN) and silicon nitride (Si₃N₄).
Zhejiang Lab (之江实验室) holds 4 active CN patents filed in 2022 — the largest single-assignee cluster in this dataset. The filings cover photonic convolutional neural network accelerator chips and time-wavelength interleaved photonic neural network chips targeting machine vision, autonomous driving, and natural language processing.
A single photonic perceptron based on a soliton crystal microcomb, using 49-wavelength Kerr microcomb-mapped synapses, achieved 95.2 Gbps single-neuron throughput.
The 2026 filing from JIS College of Engineering (IN) describes a domain-specific compiler generating reconfiguration bytecode that maps sparse ML computation graphs onto photonic mesh patches in real time, enabling thermo-optic and electro-optic switch reconfiguration before each neural network layer — a step toward software-defined photonic AI acceleration.
According to CrossLight, the coherent ONN pruning work, and the uncertainty optimization paper in this dataset, thermal crosstalk and fabrication-induced phase errors are identified as the primary barriers to coherent photonic neural network deployment.
Data and insights on this page are based on a limited patent and literature dataset and are for reference only. Figures may not represent the complete technology landscape.