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Run your analysis now →https://www.patsnap.com/resources/blog/rd-blog/power-semiconductors-vertical-gan-transistor-patent-landscape-patent-landscape/ · Patsnap · data cut-off 2026-08-31 · downloaded from the live page
Power Semiconductors · Patent LandscapeVertical GaN Transistor Patents: Leaders, Filing Trends and Open Claim Space
A patent landscape review of vertical GaN transistor filings: leading assignees, filing trends, IPC composition and white space, built from 330 records published 2015-2026.
330
Published Records
25%
Top-5 Share of All Records
+20%
Filing Growth 2021→2024
US
Leading Jurisdiction
Filing growth = 2021 (15 records) → 2024 (18); 2024 is the last year we treat as complete. Top-5 share = the 5 largest assignees ÷ all 330 records in scope (CR5), not the ranked leaders only.
Published byPatsnap Research··7 min readSourced from Patsnap Eureka
Overview
What the vertical GaN transistor patent record shows
Vertical GaN transistor architectures move current through the thickness of the device rather than laterally across its surface, a geometry that promises higher breakdown voltage and better thermal handling than lateral HEMT designs. The patent record captured here spans 330 published records from 2015 through the 2026 cut-off, drawn from filings that describe vertical GaN structures directly in their claims or that combine vertical transistor claims with core semiconductor-device IPC classes. Publication lag means the last one to two years of filings are still arriving, so the most recent counts understate real filing activity.
The dataset is built from patent families rather than raw document duplicates, which keeps continuation filings and multi-jurisdiction copies of the same invention from inflating any single company's apparent output. That matters here because a handful of assignees file heavily across multiple offices, and family-level counting is what keeps the concentration figures honest.
Filing activity and technology mix, 2015-2026
Source: Patsnap Eureka. Assignee ranking and totals. Derived from a Patsnap search on Power Semiconductors: Vertical GaN Transistor Patent Landscape covering 2015–2026, data cut-off 2026-08-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
The data
Filing trends and technology composition
Two views of the same 330-record dataset: how filing volume has moved year over year, and how those records break down across IPC subclasses. Both use the full record set as the denominator.
Filing trend, 2017-2026
Annual filings rose from 23 in 2017 to a peak of 24 in 2020, held in a similar band through the low-to-mid twenties, then grew 20% from 2021 (15) to 2024 (18) in the last span unaffected by publication lag. 2025 and 2026 figures are partial by construction and should not be read as a slowdown.
Publication lags filing by roughly 18 months, so 2025 onwards are still filling in. Growth rates on this page therefore end at 2024; running them to the last bar would understate the field.
IPC subclass composition
H01L (semiconductor devices generally) covers 91.8% of the 330 records and H10D (semiconductor devices, general) covers 53.9%, confirming that most filings sit squarely in core device structure claims. Smaller subclasses — H10P at 7.9%, H03K at 7.0%, H10W at 6.4%, H10N at 2.7%, H10B at 1.8% and H01S at 1.5% — mark where circuit integration, memory-adjacent manufacture and optoelectronic crossover claims are comparatively rare, since a record can carry more than one class these shares sum above 100%.
Shares are the percentage of the 330 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Source: Patsnap Eureka. Filing trend and technology composition. Derived from a Patsnap search on Power Semiconductors: Vertical GaN Transistor Patent Landscape covering 2015–2026, data cut-off 2026-08-31. Counts reflect published records only and shift as new filings publish.
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Representative filing and most-cited prior art
Representative record
WO2019103698A1 — Vertical GaN transistor with insulating channel
ELEKTROTECHNICKÝ ÚSTAV SAV
The filing describes a vertical GaN transistor built from a conductive GaN substrate, a drift n-GaN layer, and a channel-insulating GaN layer where residual donors are compensated by impurities and defects, topped with a contacting n+ GaN layer. Source and gate electrodes sit on the front and along the channel, while the drain electrode is placed on the substrate backside — a fully vertical current path through compensated, insulating GaN rather than a conventional doped channel.Filed by Elektrotechnický ústav SAV, published 2019-05-31.
Most-cited records in the dataset
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US20050258451A1 | Methods of fabricating nitride-based transistors having regrown ohmic contact regions and nitride-based trans… | 261 |
| 2 | US20140353574A1 | Field effect transistor structure comprising a stack of vertically separated channel nanowires | 121 |
| 3 | US20070295993A1 | Low Density Drain HEMTs | 104 |
| 4 | US20150255547A1 | III-Nitride High Electron Mobility Transistor Structures and Methods for Fabrication of Same | 98 |
| 5 | US20050258450A1 | Semiconductor devices having a hybrid channel layer, current aperture transistors and methods of fabricating … | 91 |
| 6 | US20160240471A1 | EMBEDDED PACKAGING FOR DEVICES AND SYSTEMS COMPRISING LATERAL GaN POWER TRANSISTORS | 83 |
| 7 | US20130307513A1 | High voltage field effect transistors | 79 |
| 8 | US20160307826A1 | PACKAGING SOLUTIONS FOR DEVICES AND SYSTEMS COMPRISING LATERAL GaN POWER TRANSISTORS | 70 |
| 9 | US20050040432A1 | Light emitting device and method | 66 |
| 10 | US20100084687A1 | Aluminum gallium nitride/gallium nitride high electron mobility transistors | 64 |
Citation counts favour older filings simply because they have had more time to accumulate references; treat them as a signal of influence on the field, not of current commercial relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
Source: Patsnap Eureka. Citation counts and representative records. Derived from a Patsnap search on Power Semiconductors: Vertical GaN Transistor Patent Landscape covering 2015–2026, data cut-off 2026-08-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
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What the numbers mean for strategy
Concentration, growth and classification data each point to a different decision: where competitors are entrenched, whether the field is still expanding, and which technical corners remain open.
Concentration
24.8%
of 330 records held by top 5 assignees
Leadership is present but not locked down
A leader at 20 records and a fifth-place filer at 13 shows a real gap between the front and the pack, but the top 5 combined still only account for 24.8% of all 330 records. That leaves the majority of the field to a long tail of single- and low-filing entrants, meaning freedom-to-operate analysis cannot rely on watching one or two firms.
Top 10 combined reach 39.4% of all records.
Growth
+20%
filing growth, 2021 to 2024
Steady expansion, not a rush
Filings grew from 15 in 2021 to 18 in 2024, a 20% rise over the only recent span not muddied by publication lag. That is measured growth rather than a land-rush, consistent with a technology moving from proof-of-concept toward qualification rather than an emerging hype cycle.
2025-2026 counts are still filling in and understate true activity.
Classification
91.8%
of records touch H01L
Core device claims dominate; integration claims are thin
H01L and H10D between them cover the bulk of filings, meaning most inventive effort is going into the transistor structure itself — layer stacks, channel design, electrode placement. Subclasses tied to circuit integration (H03K), packaging-adjacent work (H10W) and optoelectronic crossover (H01S) sit in single digits, which is where structural claim space is least occupied.
Shares sum above 100% because records carry multiple IPC classes.
Prior art
261 citations
on the most-cited record
Foundational nitride-transistor art still anchors the field
The most-cited record in the dataset concerns regrown ohmic contact regions in nitride-based transistors, filed well before the current wave of vertical-specific claims. High citation counts here reflect age and foundational status inside this corpus rather than present commercial weight, and should be read alongside the newer, lower-citation vertical-architecture claims rather than instead of them.
Citation counts favour older filings by construction.
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Source: Patsnap Eureka. Co-assignee relationships and derived observations. Derived from a Patsnap search on Power Semiconductors: Vertical GaN Transistor Patent Landscape covering 2015–2026, data cut-off 2026-08-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
What's next
Where to take this analysis
The dataset points to a field with clear structural leaders but wide open claim territory around integration and packaging. The next step is turning that into a specific filing or freedom-to-operate decision.
Map the white space precisely
Subclasses like H10N, H10B and H01S each cover under 3% of records, suggesting device integration and optoelectronic crossover claims around vertical GaN are comparatively open. A deeper claim-chart pass on those subclasses would confirm exactly where a first-filed claim could sit.
Explore white space in EurekaTrack the long tail, not just the leader
With the top 5 assignees holding only 24.8% of the 330 records, most competitive activity comes from entrants outside the ranked leadership. Ongoing monitoring of new filers matters as much as watching the incumbent with 20 records.
Set up assignee tracking in EurekaTest designs against the most-cited prior art
The five most-cited records anchor decades of nitride-transistor claim language; any new vertical GaN filing should be checked against their claim scope before drafting, particularly around ohmic contact regrowth and channel layer structure.
Run a claim comparison in EurekaSource: Patsnap Eureka. Forward-looking reading of the same dataset. Derived from a Patsnap search on Power Semiconductors: Vertical GaN Transistor Patent Landscape covering 2015–2026, data cut-off 2026-08-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
FAQ
Common questions on vertical GaN transistor patents
Across the 330 records in this dataset, the top filer holds 20 records and the fifth-ranked assignee holds 13, with the top 5 combined accounting for 24.8% of all records in scope. That leaves the majority of filings spread across a long tail of companies and research institutes with smaller counts. Because the ranking runs to 100 companies rather than a short list, no single firm controls the field, and monitoring needs to extend well beyond the handful of names at the top.
Filings rose from 15 in 2021 to 18 in 2024, a 20% increase over the most recent three-year span not affected by publication lag. Earlier years show a peak of 24 filings in 2020 after climbing from 23 in 2017, so the field has been filing at a fairly steady pace rather than accelerating sharply or declining. Counts for 2025 and 2026 appear lower only because publication typically lags actual filing by around 18 months, not because activity has dropped.
H01L (semiconductor devices generally) touches 91.8% of the 330 records and H10D (semiconductor devices, general) touches 53.9%, meaning the overwhelming majority of patent activity concerns core transistor structure: layer stacks, channel design and electrode placement. Subclasses tied to pulse/logic circuitry (H03K), packaging-related work (H10W) and device integration (H10N) each cover under 8% of records, marking them as comparatively lighter-filed technical corners within the same broad field.
WO2019103698A1, filed by Elektrotechnický ústav SAV and published in 2019, describes a vertical GaN transistor built around an insulating channel layer where residual donors are compensated by impurities and defects, sandwiched between a drift n-GaN layer and a contacting n+ GaN layer, with the drain electrode placed on the substrate backside. This fully vertical current path through a compensated, insulating channel is a distinct approach from conventional doped-channel vertical GaN designs. Anyone drafting claims around insulating-channel vertical GaN structures should review its scope closely before finalising claim language.
The IPC composition shows lighter filing in subclasses adjacent to the core transistor structure claims: H10N (other electric solid-state devices) at 2.7% of records, H10B (memory device manufacture) at 1.8%, and H01S (lasers and stimulated emission) at 1.5%. These lower shares suggest device integration, memory-adjacent manufacture, and optoelectronic crossover applications of vertical GaN remain comparatively under-claimed relative to the dense core structural claim space in H01L and H10D. That does not mean the technology is easy to build, only that fewer claims currently occupy that space.
Answers are grounded in the same dataset. Derived from a Patsnap search on Power Semiconductors: Vertical GaN Transistor Patent Landscape covering 2015–2026, data cut-off 2026-08-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company's registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.