The assignee ranking for this dataset covers 39 companies and research institutes across 52 records, with one assignee holding 14 records, well ahead of the rest. The top 5 assignees combined hold 33 of the 52 records (63.5%), and the top 10 extend that to 43 records (82.7%). Beyond that group the ranking flattens quickly, with most remaining assignees holding only one or two records each, so the field is concentrated at the top but has a genuine long tail of smaller filers.

In this dataset it refers to methods for modelling how voltage and current behave in a power system over very short time steps, often on specialised hardware like FPGAs, so that the simulation can run at or faster than real time. US12032879B2 is a representative example: it reduces a circuit's topology to two matrix parameters during initialisation so the main simulation loop only needs matrix multiplication. Patents in this class typically claim either the numerical method itself or the hardware architecture that executes it.

Not in a way that can be stated as a rate. Filings ran from 0 in 2017 to a peak of 5 in 2018, and the most recent years are both thin and affected by publication lag, since patents typically publish around 18 months after filing. The honest reading is that recent-year totals will rise as more filings publish, but there is not yet a clean multi-year trend to point to.

G06F (electric digital data processing) is the dominant class, appearing on 71.2% of the 52 records in scope, which indicates most patents here are framed as computational or software methods. G05B (control and regulating systems) and G09B (educational and demonstration aids) each cover 26.9% of records, and G06T (image data processing) covers 25.0%. Turbine, gas-turbine and pump-related classes (F01D, F02C, F04D, G05D) each sit between 11.5% and 13.5%, reflecting the hardware-in-loop applications tied to physical plant simulation.

The dominant claim clusters sit in general-purpose data processing (G06F) and control systems (G05B), which means sub-areas like FPGA-specific transient solver architectures, parallel partitioning for interface algorithms, and numerical stability certification methods are comparatively less crowded. These are inferred from the class distribution and citation table rather than a gap analysis tool, so any filing decision should be checked against the actual claims of the top assignees first, not just the class-level counts.