Reticle & Wafer Carrier Cleanliness Patents: Top Companies 2026
- Concentrated at the top. the five leading assignees together hold 53.2% of all 333 records in scope, and the leading ten hold 72.4%.
- Filing has plateaued, not grown. activity ran flat from 17 filings in 2021 to 17 in 2024, a 0% span after a 2022 peak of 23.
- Litigation-grade prior art is old. the most-cited record in the set, cited 393 times, published back in 2015 — a reminder that citation counts reward age, not current relevance.
Filing growth compares 2021 (17 records) with 2024 (17) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 333 records in scope (CR5), not by the ranked leaders only.
What this landscape covers
This landscape tracks patent activity at the intersection of reticle pod and wafer carrier design and the cleanliness mechanisms built into them: purge routines, outgassing control, particle adders, electrostatic attraction effects, seal integrity and pod cleaning methods. It spans 333 published records filed between 2015 and mid-2026, with the most recent year necessarily incomplete because publication trails filing by roughly eighteen months.
The scope sits squarely in semiconductor front-end tooling: carriers and pods that move reticles and wafers between process steps without introducing particles, outgassed polymers or static charge onto the surfaces they protect. That places it at the boundary of lithography equipment makers, wafer-fab equipment suppliers and materials specialists who each patent a different layer of the same handling problem.
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Filing trend and technology composition
The dataset spans 333 published records across ten years of continuous filing, with IPC classification showing where cleanliness-specific claims cluster inside the broader semiconductor equipment stack.
A decade of flat-to-cyclical filing
Filings rose from zero in 2017 to a peak of 23 in 2022, then settled back to 17 in 2024 — the same level as 2021, for a measured 0% change across that three-year span. Treat 2025 and 2026 figures as still filling in rather than as a genuine slowdown.
Where the claims sit
H01L (semiconductor devices) touches 54.4% of the 333 records, with H10P close behind at 40.8% and G03F (photolithography and photomechanics) at 22.5% — evidence that cleanliness mechanisms are claimed mostly as features of device and lithography hardware rather than as standalone containers. B65D (containers and packaging) and B24B (grinding and polishing) sit at the edges of the field, each near 5%, marking the packaging and post-process angles as comparatively thin.
Shares are the percentage of the 333 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on Reticle and Wafer Carrier Cleanliness with Eureka
This page is one run against one query. Ask Eureka your own question about reticle and wafer carrier cleanliness and every answer comes back with the patent numbers behind it.
Try EurekaA foundational filing worth reading first
US9159595B2 — Thin wafer carrier (Suss MicroTec Lithography)
An improved wafer carrier device for carrying and holding semiconductor wafers that have a thickness of below 100 micrometers includes a transportable wafer chuck having an enclosed vacuum reservoir and a top surface configured to support a wafer. The top surface has one or more through-openings extending from the top surface to the vacuum reservoir and the wafer is held onto the top surface via vacuum from the vacuum reservoir drawn through the through-openings.Filed 2015-10-13 — anchors a vacuum-chuck approach to thin-wafer handling that later filings in this set build against.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US20150064923A1 | Plasma processing device and plasma processing method | 393 |
| 2 | US5565034A | Apparatus for processing substrates having a film formed on a surface of the substrate | 228 |
| 3 | US20040033639A1 | Integrated method for release and passivation of MEMS structures | 183 |
| 4 | US20020196421A1 | Stage device, exposure apparatus and method | 150 |
| 5 | US6190237B1 | pH-buffered slurry and use thereof for polishing | 109 |
| 6 | US6054181A | Method of substrate processing to form a film on multiple target objects | 106 |
| 7 | US6902947B2 | Integrated method for release and passivation of MEMS structures | 90 |
| 8 | US6788385B2 | Stage device, exposure apparatus and method | 89 |
| 9 | US5725664A | Semiconductor wafer processing apparatus including localized humidification between coating and heat treatmen… | 89 |
| 10 | US5373806A | Particulate-free epitaxial process | 75 |
Citation counts inside a searched corpus favour older filings; use them as a signal of influence on later art, not of current commercial weight.
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Browse MCP servers →What the numbers mean for a filing decision
Three patterns stand out once concentration, technology mix and receiving offices are read together.
The field is led, not crowded
Five assignees account for 53.2% of all 333 records, and the leading ten reach 72.4%. That leaves a long tail of single- and few-filing entrants competing for the remaining claim space rather than a fragmented open field.
Cleanliness claims ride on device and lithography IPC codes
H01L and H10P between them touch a majority of records, meaning cleanliness mechanisms are usually claimed as part of a device or process rather than as an independent carrier invention. G03F's 22.5% share confirms lithography tooling as the second-largest home for these claims.
US filing dominates, PCT and EPO trail evenly
United States receiving-office filings (172) outnumber the next largest routes — EPO and WIPO PCT, each at 43 — by a wide margin, with Japan close behind at 42. Any freedom-to-operate check should start with US prosecution history before widening to PCT and EPO family members.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to reticle and wafer carrier cleanliness, with the prior art for and against each one.
Assignee landscape and recent momentum
The ranking covers 94 companies drawn from the 333 records in scope, with filing activity concentrated among lithography and wafer-fab equipment makers.
One filer sits well ahead of the field
The leading assignee holds 51 records against a fifth-place figure of 27 and a tenth-place figure of 10 — a steep drop-off that marks this as a leader-and-followers field rather than several evenly matched rivals.
Recent-year activity has gone quiet across the top names
The current leader logged just 1 filing in the latest year at 0% YoY change, while several other top-ranked assignees show 0 filings in the latest year and a -100% YoY reading. Given publication lag, this reads as data still filling in rather than firms exiting the space.
Co-filing is limited and mostly intra-group
Only 10 co-assignee pairs appear across the dataset, and the strongest link — 16 shared records — sits between two entities inside the same corporate family. Cross-company joint filing is not a meaningful feature of this landscape.
| Assignee | Recent year | YoY |
|---|---|---|
| Tokyo Electron Ltd | 1 | 0% |
| ASML Netherlands BV | 1 | — |
| Applied Materials Inc | 0 | -100% |
| Canon KK | 0 | -100% |
| FEI Co | 0 | — |
| ASML Holding NV | 0 | — |
| Nikon Corp | 0 | — |
| Taiwan Semiconductor Manufacturing Co Ltd | 0 | -100% |
Where to take this from here
The landscape points to a mature, top-heavy filing pattern with specific gaps still open for new claims.
Map freedom-to-operate against the leading assignees
With the top ten holding 72.4% of records, any new carrier or pod cleanliness design should be checked against the leading assignees' active families before committing to a claim strategy.
Explore assignee portfolios in EurekaProbe the under-claimed sub-areas directly
Sensor-integrated outgassing detection and post-CMP decontamination sit outside the dense IPC core and warrant a dedicated prior-art pull before drafting.
Run a white-space search in EurekaTrack the next 18 months of publications
Because 2025-2026 filings are still publishing, re-running this trend query periodically will sharpen the read on whether the 2022 peak was a one-off or the start of a new cycle.
Set up a monitoring alert in EurekaCommon questions on this landscape
The dataset ranks 94 companies by record count, with the leading assignee holding 51 of the 333 records in scope. The top five together account for 53.2% of all records, and the top ten reach 72.4%, which marks this as a leader-and-followers field rather than an evenly split market. Beyond the leading names, a long tail of assignees hold only a handful of filings each, so competitive attention should focus on the leading group first.
Filing activity peaked at 23 records in 2022 and had returned to 17 by 2024, matching the 2021 level for a flat 0% change across that three-year span. Figures for 2025 and 2026 are still incomplete because publication typically lags filing by around eighteen months, so they should not be read as a decline. The honest read is a plateau after a 2022 spike, not sustained growth or contraction.
H01L (semiconductor devices) appears in 54.4% of the 333 records and H10P in 40.8%, showing that most cleanliness claims are drafted as features of device or process patents. G03F, covering photolithography and photomechanics, appears in 22.5% of records, reflecting the close tie between reticle handling and exposure tooling. Smaller classes such as B65D (containers and packaging) and B24B (grinding and polishing) each sit near 5%, marking narrower niches within the field.
The densest claim territory sits in H01L, H10P and G03F, where a majority of records already cluster, so filing there means competing against established portfolios. Thinner areas include packaging-integrated particle shielding, static-dissipative seal materials and post-CMP carrier decontamination, all of which sit outside the dense IPC core. A targeted prior-art search on those specific sub-areas, rather than the field as a whole, is the more productive starting point.
US9159595B2, assigned to Suss MicroTec Lithography and filed in 2015, claims a wafer carrier built around a transportable chuck with an enclosed vacuum reservoir and a top surface with through-openings that hold sub-100-micrometre wafers by vacuum. It is included here as a representative filing showing how thin-wafer handling was addressed mechanically rather than through pod-level environmental control. Anyone designing a vacuum-based thin-wafer carrier should read its claims closely before finalising a chuck geometry, since it predates much of the later art in this dataset.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.