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Semiconductor Epitaxy Process Control Patents: Leaders & Trends 2026

Semiconductor Epitaxy Process Control Patents: Leaders & Trends 2026
https://www.patsnap.com/resources/blog/rd-blog/semiconductor-epitaxy-process-control-patent-landscape/ · Patsnap · data cut-off 2026-07-31 · downloaded from the live page
Patent Landscape · Semiconductors & Microelectronics
Semiconductor Epitaxy Process Control Patents
  • Filing has cooled since its 2021 peak. 14 families were filed in 2021 against a flat-to-declining count through the 2022 midpoint of 6, and the dataset's leading assignees show 0 filings and -100% YoY momentum in the latest full year.
  • Claim activity concentrates in a narrow crystal-growth core. H01L accounts for 102 of 119 records and C30B for 50, meaning most protected ground sits at the intersection of device architecture and crystal growth rather than in adjacent measurement or metrology classes.
  • The US is the dominant filing venue by a wide margin. 78 of the tracked records were filed at the USPTO, more than ten times the next-largest single office (China at 12), which concentrates freedom-to-operate risk in one jurisdiction.
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119
Published Records
54%
Top-5 Share of All Records
-71%
3-Yr Growth (lag-adjusted)
US
Leading Jurisdiction
Published byPatsnap Research··7 min readSourced from Patsnap Eureka
Overview

What this landscape covers

Epitaxy process control covers the instrumentation, feedback loops and process models used to hold layer thickness, composition and defect density within specification while a semiconductor wafer is grown layer by layer. This landscape tracks 119 patent families filed between 2015 and mid-2026 that combine epitaxial growth or deposition language with process-control terms such as growth rate control, in-situ monitoring and defect density control, filtered to the crystal-growth and semiconductor-device IPC classes most likely to contain enforceable claims.

Because publication typically lags filing by around 18 months, the most recent one or two years in any trend chart will understate actual filing activity; treat the tail of the chart as a floor, not a ceiling. Family counts, rather than raw document counts, are used throughout so that continuation practice and multi-jurisdiction filing by the same applicant do not distort the ranking.

Filing activity and technology composition, 2015-2026
  1. 1APPLIED MATERIALS INC25
  2. 2TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD15
  3. 3INTERNATIONAL BUSINESS MACHINE CORPORATION12
  4. 4VEECO INSTRUMENTS INC7
  5. 5OXFORD INSTR NANOTECHNOLOGY TOOLS LTD5
  6. 6INFINEON TECH AUSTRIA AG4
  7. 7ASM IP HLDG BV3
  8. 8NEWPORT FAB LLC2
  9. 9XIDIAN UNIV2
  10. 10INTEL CORP2
Source: Patsnap Eureka. Assignee ranking and totals. Derived from a Patsnap search on Semiconductor Epitaxy Process Control covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
The data

Filing trend and technology composition

Two views of the same 119 families: how filing volume has moved year over year, and which IPC subclasses carry the claim density.

Filing trend, 2017-2026

Filings rose from 4 in 2017 to a peak of 14 in 2021, then declined toward the 2022 midpoint of 6 and continued flat through the most recent (partial) year. This is a maturing filing curve, not a growing one, though the 2025-2026 tail is understated by publication lag.

Filing trend, 2017-2026048111542017201820192020142021202220232024202512026Most recent year is partial — publication lag means later filings are not yet visible.

IPC subclass distribution

H01L (semiconductor devices, 102 records) and C30B (crystal growth, 50 records) dominate; H10P (56), H10D (15) and H10B (8) reflect device-integration claims layered on top of the growth process itself. Measurement-specific classes G01B and G01J each hold only 5 records, a thin footprint relative to how central in-situ monitoring is to the search terms.

IPC subclass distributionH01L · Semiconductor devices10285.7%H10P5647.1%C30B · Crystal growth5042.0%C23C · Coating & surface deposition1815.1%H10D · Semiconductor devices (general)1512.6%H10B · Memory device manufacture86.7%G01B · Measuring length & dimensions54.2%G01J · Radiation & light measurement54.2%Other2319.3%

Shares are the percentage of the 119 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.

Source: Patsnap Eureka. Filing trend and technology composition. Derived from a Patsnap search on Semiconductor Epitaxy Process Control covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.

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Key patents

Most-cited prior art and a recent representative filing

Representative recent filing
US20250034753A12025-01-30

Epitaxy Process Control in Semiconductor Manufacturing (US20250034753A1, Robert Bosch GmbH, filed 2025-01-30)

ROBERT BOSCH GMBH

The application describes a run-to-run (R2R) controller that adjusts epitaxy process parameters between successive semiconductor components based on prior measurements and a process model. The model predicts a manipulated variable tied to process time and a controlled variable of layer thickness, and separately predicts a second controlled variable of specific resistance from a second manipulated variable.Abstract condensed from the original filing.

US20250034753A1 — patent drawing 1US20250034753A1 — patent drawing 2
View full record
Highest-cited records in this corpus
#Publication no.Patent titleCitations
1US20140045324A1Low temperature epitaxy of a semiconductor alloy including silicon and germanium employing a high order silan…390
2US6784085B2MIIIN based materials and methods and apparatus for producing same111
3US6313016B1Method for producing epitaxial silicon germanium layers104
4US6828632B2Stable PD-SOI devices and methods80
5US20200365687A1Nanosheet bottom isolation and source or drain epitaxial growth55
6WO2002097864A2Low temperature load and bake50
7US6444591B1Method for reducing contamination prior to epitaxial growth and related structure49
8DE19753494A1Silicon wafer especially SOI wafer production49
9US20120272892A1Metal-Organic Vapor Phase Epitaxy System and Process48
10US20140264384A1SiC SUBSTRATE WITH SiC EPITAXIAL FILM42

Citation counts inside a searched corpus skew toward older records simply because they have had more time to accumulate citations; read them as a signal of influence on the field, not as a measure of current commercial relevance.

Each row carries its publication number; clicking a row searches Eureka by that number.

Source: Patsnap Eureka. Citation counts and representative records. Derived from a Patsnap search on Semiconductor Epitaxy Process Control covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
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Insights

What the numbers say

Three patterns stand out once filing volume, technology mix and geography are laid side by side.

Filing momentum
Peak 2021 (14) vs. 2022 midpoint (6)
families per year

Growth has flattened after a 2021 peak

The filing curve rose from 4 families in 2017 to a peak of 14 in 2021, then fell back to 6 by the 2022 midpoint and stayed flat into the most recent years. Several leading assignees show 0 filings and -100% YoY in the latest full year, consistent with a technology that has settled into incremental rather than expansive claim-building.

Interpretation: a mature, not a growing, filing curve.
Claim concentration
H01L 102 / C30B 50 of 119 records
IPC subclass share

Claim density sits in device and crystal-growth classes

H01L and C30B between them touch the great majority of the 119 records, meaning process-control claims are mostly anchored to semiconductor device structure or bulk crystal growth rather than filed as standalone measurement or monitoring inventions.

Metrology-specific classes (G01B, G01J) remain thin at 5 records each.
Jurisdiction
US 78 of ~110 receiving-office filings
filings at USPTO

Filing activity is concentrated at the USPTO

The United States receives roughly ten times the filings of the next single office (China, 12), with the UK, EPO, WIPO/PCT and Japan each in single digits. Freedom-to-operate diligence in this space cannot skip US prosecution history without missing most of the record.

Geographic concentration narrows where clearance searches need to focus.
Eureka AI Agent
Looking for what nobody has claimed yet?

Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to semiconductor epitaxy process control, with the prior art for and against each one.

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Source: Patsnap Eureka. Co-assignee relationships and derived observations. Derived from a Patsnap search on Semiconductor Epitaxy Process Control covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
Players

Who holds ground, and where the gaps sit

The assignee list is a mix of established semiconductor equipment and device makers with a long tail of single-filing entrants; recent-year momentum has stalled across the named leaders tracked in this dataset.

Filing pattern
0 filings, -100% YoY
latest-year momentum

Leading assignees have gone quiet in the latest year

Every named assignee in the recent-momentum data shows zero filings in the latest tracked year, including equipment and device manufacturers with substantial historical portfolios. This may reflect publication lag as much as an actual pause in R&D, since filings from the last 12-18 months are not yet fully visible.

Read the flat momentum against the 18-month publication lag before concluding activity has stopped.
Collaboration
4 co-assignee pairs
joint filings

Co-filing is rare in this corpus

Only 4 co-assignee pairs appear across 119 families, and the strongest pair links two organisations on just two shared filings. Most epitaxy process-control IP here is filed by a single owner rather than developed jointly, which is typical where the claimed subject matter sits close to in-house tool or process know-how.

Sparse co-filing suggests limited licensing or joint-development activity to trace.
Prior art anchor
390 citations, US20140045324A1
top-cited record

One low-temperature SiGe epitaxy patent anchors the field

The most-cited record in the corpus concerns low-temperature epitaxy of silicon-germanium alloys using a high-order silane precursor, cited 390 times. Its influence, and that of the next several highest-cited records on SiGe layers and III-N materials, marks the compositional and material chemistry ground that later filers have had to design around.

High citation counts here reflect foundational chemistry claims, not recent activity.
🔍
Under-claimed sub-areas
Branches with thin filing density relative to their technical importance to process control.
In-situ defect density metrologyReal-time growth-rate optical sensingR2R model-based control for compound semiconductorsSpecific-resistance feedback controlNanosheet source/drain epitaxy isolation
Rank all filers by momentum →
Recent-year filing momentum by assignee
AssigneeRecent yearYoY
Applied Materials, Inc.0-100%
Taiwan Semiconductor Manufacturing Company (TSMC)0
International Business Machines Corporation (IBM)0
Ultratech, Inc.0
Oxford Instruments Nanotechnology Tools Limited0
Infineon Technologies Austria AG0
ASM America, Inc.0
Xidian University0
Source: Patsnap Eureka. Assignee-level momentum. Derived from a Patsnap search on Semiconductor Epitaxy Process Control covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
What's next

Where to take this

The dataset points to specific next steps depending on whether the goal is clearance, licensing or R&D targeting.

Run a freedom-to-operate check anchored on US filings

With 78 of roughly 110 receiving-office filings sitting at the USPTO, any product intended for the US market needs US prosecution history reviewed first, including the highest-cited SiGe and III-N chemistry patents.

Explore prior art in Eureka

Watch for a filing rebound as the 2024-2026 lag clears

The apparent drop-off after 2021 partly reflects publication lag; re-check filing counts for 2024-2026 in twelve to eighteen months before concluding the field has genuinely slowed.

Track filing trends in Eureka

Target thin metrology and control classes for new claims

G01B and G01J each hold only 5 records against 102 in H01L, suggesting in-situ measurement and optical monitoring claims tied to epitaxy control remain comparatively open.

Map white space in Eureka
Source: Patsnap Eureka. Forward-looking reading of the same dataset. Derived from a Patsnap search on Semiconductor Epitaxy Process Control covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
FAQ

Common questions

Answers are grounded in the same dataset. Derived from a Patsnap search on Semiconductor Epitaxy Process Control covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP

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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.

Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.

Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.

Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.

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