This landscape identifies 29 published patent families matching claims that combine SiC MOSFET device structure with epitaxial-layer, substrate-quality, or doping-material language, filtered to the H01L29/16, C30B29/36 and H01L21/02 IPC classes. That is a small dataset for a semiconductor topic, which means single filings can shift assignee rankings noticeably. Broader SiC power-device searches without the materials-claim filter will return substantially larger counts because they capture device claims that do not specifically tie back to epitaxy or doping chemistry.

The data shows filings rising to a peak of 7 families in 2020, then falling to 3 by the 2022 midpoint with no families indicating a rebound through the end of the window. Publication lag of roughly 18 months means the very latest years are always undercounted, so some of the apparent 2025-2026 drop is an artefact of when the dataset was pulled rather than a true stop in filing. Even allowing for that lag, though, the decline from the 2020 peak through the mid-decade years predates the affected period, suggesting real cooling in this specific claim combination rather than a data artefact alone.

Recent-year momentum in this dataset reads zero across every tracked assignee, including firms with established filing histories in the space, and at least one shows a -100% year-over-year change. That does not mean these companies have exited SiC entirely — it may reflect a shift toward filing under different claim language, a pause tied to publication lag, or genuine reduced investment in this narrow epitaxy-plus-device combination. Anyone tracking this space closely should re-run the search periodically rather than treating the current snapshot as final.

US20220190104A1, filed by Shenzhen Sanrise-Tech, claims an SiC MOSFET with a trench gate where a first bottom doped region beneath the trench connects to the source so gate-oxide voltage stress is governed by gate-source rather than drain voltage, plus a second deep doped region spaced from the trench with its own bottom surface positioned below the first. Anyone designing a trench-gate SiC MOSFET with source-tied bottom protection and a spaced deep doped region sharing that specific vertical relationship needs to check this claim scope closely. Designs using planar gates, different bias schemes for the bottom protection region, or doped regions without that specific depth relationship are more likely to sit outside its claims, but a freedom-to-operate check against the granted claim set is the only reliable answer.

The IPC composition shows nearly every family (29 of 29) claiming general device structure under H01L, while only one family reaches C01B, the class covering inorganic-compound chemistry — meaning the underlying substrate-growth and doping-material chemistry is comparatively under-claimed relative to device architecture built on top of it. Specific gaps include doping uniformity control within the epitaxial layer, gradient co-doping profiles between n-type and p-type regions, and defect-density reduction methods for high-quality SiC substrates. These are process-and-materials claims rather than device claims, and the thin filing density there reflects either genuine technical difficulty or an area competitors have not prioritised — worth checking both before assuming it is open.