Silicon Photonic Coherent Transceiver Patents 2026
Silicon Photonic Coherent Transceiver Patents 2026
Silicon photonic coherent transceivers integrate tunable lasers, Mach-Zehnder modulators, and germanium photodetectors on SOI substrates for data center and telecom applications. This dataset spans 2006–2026, with the most active filing window concentrated in 2017–2025.
Coherent Silicon Photonics: Architecture and Integration Challenges
Silicon photonic coherent transceivers exploit high refractive index contrast of SOI waveguides to confine optical signals on CMOS-compatible chips. The fundamental coherent architecture requires four blocks: a tunable laser source, a dual Mach-Zehnder I/Q modulator subsystem, a polarization-beam-splitter-rotator and 90-degree hybrid coherent receiver, and high-speed germanium-on-silicon photodetectors with TIAs.
The central integration challenge is that silicon does not lase natively, requiring heterogeneous solutions. In this dataset, the dominant commercial approach is flip-chip integration of InP laser diodes with Vernier-ring wavelength-tuning sections onto silicon photonic substrates, extensively patented by Marvell Asia. Acacia Technology pursued an alternative: bonding InP chips into recesses etched directly in the silicon photonic die.
A secondary integration paradigm revealed in this dataset uses silicon nitride resonator-based optical frequency combs as multi-wavelength laser sources, demonstrated at 6.4 Tbps aggregate capacity by Zhejiang Lab. This soliton microcomb approach drives 32-channel WDM transmission from silicon carrier-depletion MZM arrays, avoiding per-channel laser chip proliferation.
In this dataset, Marvell Asia Pte Ltd. accounts for approximately 40% of all coherent transceiver patent records, spanning filings from 2017 through 2025 in US and DE jurisdictions. Acacia Technology holds 4 foundational records, and Zhejiang Lab holds 4 records across CN and US jurisdictions in retrieved records.
Filing Trends and Technology Cluster Distribution
The dataset spans 2006–2026, with the majority of high-relevance coherent transceiver filings concentrated in 2017–2025. Four primary technology clusters are identifiable: flip-chip heterogeneous laser integration, InP-bonded monolithic transceivers, optical frequency comb photonic engines, and advanced packaging for chiplet interconnects.
Patent Records by Technology Cluster (Dataset Snapshot)
In this dataset, flip-chip heterogeneous integration (Marvell Asia) accounts for the largest share of records, followed by monolithic InP-bonded architectures and frequency comb photonic engines.
↗ Click bars to exploreFiling Activity by Period — Silicon Photonic Coherent Transceiver (Dataset Snapshot)
In this dataset, filing activity accelerated sharply in the 2017–2022 window, with the most recent 2023–2026 period introducing new architectural directions including AI chiplet bridges and frequency comb engines.
↗ Click bars to exploreKey Application Domains for Silicon Photonic Coherent Transceivers
The dataset identifies five distinct application domains for silicon photonic coherent transceivers: data center interconnects, telecommunications, passive optical networks, AI accelerator chiplet interconnects, and LiDAR. Each domain is represented by named patent assignees and specific technical architectures grounded in retrieved filings.
Data Center Interconnect (DCI)
Alibaba Group Holding Limited filed a US patent in 2021 targeting high-speed silicon photonics optical transceivers using CWDM-based datacenter architectures with un-cooled lasers for cost reduction. The Marvell Asia coherent engine family explicitly targets both intra-datacenter (500 m to 2 km) and inter-datacenter (greater than 80 km) coherent links. Literature in this dataset confirms 400 Gbps DR4 silicon photonic transmitters targeting QSFP-DD form factors.
Data Center InterconnectTelecom Metro and Long-Haul
Acacia Communications filed a multichannel coherent transceiver patent (SG, 2017) integrating a multi-core ASIC, tunable laser array, and multi-channel photonic IC in a single package for multi-wavelength coherent transmission. Marvell Asia’s Integrated Coherent Optical Transceiver was filed in DE jurisdiction in 2020, extending coverage to European telecom deployments. These architectures target C-band and O-band applications at 400G ZR and 800G coherent data rates.
TelecommunicationsPassive Optical Network (PON/FTTx)
Sunte Technologies (Nan Chang) filed a US patent in 2025 for a silicon-based optoelectronic transceiver integrated chip for PON OLT systems. Shenzhen Xuntech Communication Technology filed both CN and US patents covering silicon-based optoelectronic transceiver chips supporting 50G PAM4 downstream and 25G upstream, using integrated MZM modulators on silicon substrates. These filings indicate coherent silicon photonic integration diffusing from long-haul into access network cost structures.
Access NetworkAI Accelerator Chiplet Interconnects
Mixx Technologies filed two 2026 patents (US and WO) targeting silicon photonic bridges as optical interconnects within multi-die AI accelerator packages, replacing electrical interposers in 2.5D/3D package stacks. Zhejiang Lab’s 6.4 Tbps photonic engine (CN 2022, US 2023, US 2026) similarly targets high-performance computing contexts using 32-channel SiN soliton comb-driven silicon modulator arrays. Shanghai Jiao Tong University also filed chip-scale silicon-based hybrid-integrated LiDAR systems (US, 2021 and 2024) combining SiN phase shifter arrays and silicon coherent receiver modules.
AI & HPC InterconnectLeading Assignees in Silicon Photonic Coherent Transceivers — Dataset Snapshot
In this dataset, Marvell Asia Pte Ltd. accounts for approximately 40% of all coherent transceiver patent records, with at least 14 distinct filings spanning 2017–2025 in US and DE jurisdictions. Acacia Technology, Inc. holds 4 foundational records in retrieved records, covering monolithic InP-bonded transceivers and electronic/optical co-packaging architectures filed 2014–2017.
Top Assignees by Patent Filing Count in Retrieved Records (Dataset Snapshot)
↗ Click bars to exploreMarvell Asia Pte Ltd.
Marvell Asia holds at least 14 distinct patent records in this dataset, spanning filings from 2017 through September 2025, all in US jurisdiction with one filing in DE. This family covers the complete coherent transceiver stack: InP flip-chip tunable laser with Vernier-ring wavelength-tuning (1535–1555 nm C-band), dual Mach-Zehnder I/Q modulators, PBSR-based dual-polarization coherent receiver with 90-degree hybrids, TIA flip-chip integration, TSV interposer packaging, and QSFP form factor packaging. All records are active in legal status, with the most recent continuation filed in September 2025 tracing back to a 2019 priority date.
Singapore — US & DE filingsAcacia Technology, Inc.
Acacia Technology holds 4 records in this dataset, all US-jurisdiction, covering filings from 2014 to 2017. Key patents include the monolithic silicon coherent transceiver with InP gain chip bonded into a recess etched in the silicon photonic die (2015, 2016) and the electronic and optical co-packaging architecture placing the photonic IC, driver electronics, TIAs, and DSP ASIC on a common carrier substrate (2014, 2017). These are foundational patents predating Marvell Asia’s volume filings and are now held by Cisco following the Acacia acquisition.
United StatesFive Emerging Directions Identified in 2023–2026 Filings
Based on filings from 2023–2026 in this dataset, five distinct emerging directions are identifiable, spanning AI chiplet photonic integration, terabit-scale frequency comb engines, adaptive multi-dimensional modulation, silicon photonics for PON access networks, and Marvell Asia’s active continuation prosecution strategy.
Silicon Photonic Bridges for AI Chiplet Packages
Mixx Technologies’ two 2026 filings (US and WO) explicitly address silicon photonics as an optical interconnect bridge within multi-die AI accelerator packages, replacing electrical interposers in 2.5D and 3D package stacks. This represents the convergence of coherent silicon photonics with advanced semiconductor packaging driven by AI infrastructure demands. Early IP positioning in silicon photonic chiplet interconnects represents a high-value opportunity with limited current competition in this dataset.
Terabit-Scale Frequency Comb Photonic Engines
Zhejiang Lab’s 6.4 Tbps photonic engine progressed from a CN filing in 2022 to a US grant-track filing in 2026, demonstrating the maturation of optical frequency comb integration into commercially oriented transceiver chip modules. A DFB laser pumps a SiN microring resonator via four-wave mixing to produce 32 comb carriers at 200 GHz spacing, individually modulated by silicon carrier-depletion MZMs. This avoids the per-channel laser chip proliferation problem inherent to conventional WDM coherent transceivers.
Flip-Chip vs. InP-Bonded Laser Integration: Key Differences
Click any row to explore further.
| Dimension | Flip-Chip Heterogeneous Integration (Marvell Asia) | InP-Bonded Monolithic Integration (Acacia/Cisco) |
|---|---|---|
| Laser Attachment Method | InP laser diode flip-mounted on silicon photonic substrate | InP gain chip bonded into recess etched in silicon photonic die |
| Coupling Loss | Higher — external attachment introduces coupling interfaces | Lower — minimizes coupling losses via direct bonding |
| Wavelength Tuning | Vernier ring reflector configuration; demonstrated 1535–1555 nm C-band | Tunable laser array integrated with multi-channel photonic IC |
| Co-Packaging Approach | TSV interposer; driver and TIA chips flip-bonded on SiPh die and TSV interposer simultaneously | Photonic IC, driver electronics, TIAs, and DSP ASIC on a common carrier substrate |
| Patent Filing Period | 2017–2025 (14+ records in dataset, US and DE) | 2014–2017 (4 records in dataset, US) |
| Current IP Holder | Marvell Asia Pte Ltd. (active, ongoing prosecution) | Acacia Technology, Inc. (now part of Cisco) |
| Architecture Maturity | Commercially deployed, QSFP form factor packaging covered in patents | Foundational patents established 2014–2016 as reference architecture |
| Target Applications | Telecom and data center coherent links; QSFP-DD 400G+ | Multi-wavelength coherent transmission; 400G ZR and 800G coherent rates |
Frequently Asked Questions: Silicon Photonic Coherent Transceiver Patents
Silicon is an indirect bandgap material and does not lase natively. This requires either heterogeneous bonding of III-V gain chips, flip-chip assembly of external laser diodes, or emerging rare-earth-doped monolithic approaches. In this dataset, the dominant commercial solution is flip-chip integration of InP laser diodes with wavelength-tuning sections onto silicon photonic substrates.
In Marvell Asia’s flip-chip integration architecture, the InP laser diode is coupled to a wavelength-tuning section using a Vernier ring reflector configuration to achieve tunable output across the C-band, demonstrated from 1535 nm to 1555 nm in this dataset’s retrieved records.
Zhejiang Lab’s 6.4 Tbps silicon-based photonics engine uses a soliton-based optical frequency comb generated in an ultra-low-loss SiN microring resonator. A DFB laser pumps the SiN resonator via four-wave mixing to produce 32 comb carriers at 200 GHz spacing, which are individually modulated by silicon carrier-depletion MZMs and recombined via SiN WDM multiplexers. The invention was filed in CN in 2022 and progressed to a US grant-track filing in 2026.
Acacia Technology bonds an InP gain chip into a recess etched directly in the silicon photonic chip, enabling monolithic integration and minimizing coupling losses. Marvell Asia’s flip-chip approach mounts the InP laser diode externally on the silicon photonic substrate. Acacia’s approach supports co-packaging of the photonic IC, driver electronics, TIAs, and DSP ASIC on a single carrier. The bonded approach may offer lower coupling loss advantages that could become critical at 400G ZR and 800G coherent data rates.
The newest application domain in this dataset is the use of silicon photonic bridges as chip-to-chip and die-to-die optical interconnects within AI accelerator packages, as filed by Mixx Technologies in 2026 (US and WO). A second emerging domain is silicon photonics for PON OLT access networks, with Sunte Technologies filing a US patent in 2025 for 50G+ silicon-based optoelectronic transceiver chips.
US jurisdiction dominates with approximately 30 or more filings in this dataset, reflecting both commercial maturity of US-based fabless coherent photonics companies and the strategic importance of US patent protection for Asian and global assignees. CN follows with approximately 10 records, with isolated filings in DE, SG, EP, WO, and IN.
Data and insights on this page are based on a limited patent and literature dataset and are for reference only. Figures may not represent the complete technology landscape.