SSD Controllers & Flash Management Patents: Top Companies 2026
- Filing has flattened, not grown. activity peaked in 2020 at 62 filings and the 2022 midpoint of 58 shows the field holding steady rather than accelerating into the most recent years.
- Every major storage assignee shows zero filings in the latest year. Samsung, Western Digital, SK hynix, LSI, Micron and Seagate all register 0 in the latest tracked year, consistent with the ~18-month publication lag rather than a real pullback.
- One 2004-era filing still anchors the field. US20040186946A1, "Flash file system," carries 356 citations — more than double the next most-cited record — meaning foundational flash management concepts remain the reference point for later claims.
What this landscape covers
This dataset tracks 601 patent families published between 2015 and mid-2026 that combine SSD controller or flash translation layer (FTL) architecture with core endurance and performance claims — garbage collection, write amplification, error correction code, quality of service and endurance management — filed under IPC classes covering digital data processing, static memories and coding. It is a claims-level view of how controllers manage the gap between raw NAND flash and the logical block interface a host sees.
The receiving-office split — dominated by the United States, with meaningful volume through China, WIPO, Europe, South Korea and Taiwan — reflects where SSD controller silicon and firmware IP is actually litigated and licensed, not just where R&D happens.
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Filing trend and technology composition
Two views of the same 601 families: how filing volume has moved year over year, and which IPC subclasses the claims actually sit in.
Filings have plateaued since 2020
From 34 filings in 2017, volume climbed to a peak of 62 in 2020, held near that level through the 2022 midpoint of 58, and tails off toward the data cut-off — a pattern consistent with publication lag rather than a genuine drop in R&D.
G06F dominates; G11C and coding classes carry the rest
593 of 601 records sit in G06F (electric digital data processing), with G11C (static and digital memories, 76 records) and H03M (coding and code conversion, 17 records) forming the two next-largest clusters — a reminder that most SSD controller IP is claimed as data-processing logic rather than as memory-cell hardware.
Shares are the percentage of the 601 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on SSD Controllers and Flash Management with Eureka
This page is one run against one query. Ask Eureka your own question about ssd controllers and flash management and every answer comes back with the patent numbers behind it.
Try EurekaThe records other filings build on
Reducing write amplification and over-provisioning using flash translation layer synchronization
A host Flash Translation Layer (FTL) synchronizes host FTL operations with drive FTL operations to reduce write amplification and over-provisioning. The host FTL maps logical host bands to physical bands on the drive, tracks validity levels of data in those bands, and uses that tracking to optimize defragmentation operations — garbage collection and trim — applied by the host FTL software stack.Filed by SK hynix NAND Product Solutions Corp. (dba Solidigm), published 2023-02-16.


| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US20040186946A1 | Flash file system | 356 |
| 2 | US20190317901A1 | System and method for optimizing performance of a solid-state drive using a deep neural network | 146 |
| 3 | US20170228157A1 | Automatic stream detection & assignment algorithm | 126 |
| 4 | US20090083476A1 | Solid state disk storage system with parallel accesssing architecture and solid state disck controller | 122 |
| 5 | US20140325117A1 | Flash translation layer with lower write amplification | 119 |
| 6 | US20140122781A1 | Hierarchical flash translation layer | 114 |
| 7 | US20100169544A1 | Methods for distributing log block associativity for real-time system and flash memory devices performing the… | 104 |
| 8 | US8024545B2 | Efficient prefetching and asynchronous writing for flash memory | 103 |
| 9 | US20140108703A1 | Scalable Data Structures for Control and Management of Non-Volatile Storage | 102 |
| 10 | US20140208003A1 | Variable-size flash translation layer | 95 |
Citation counts favour older filings simply by virtue of being in the corpus longer; treat them as a measure of influence on later claims, not of present-day relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Browse MCP servers →What the numbers mean for a filing decision
Three patterns worth acting on before drafting new claims in this space.
Growth has flattened, not stopped
The jump from 34 filings in 2017 to a 2020 peak of 62 suggests a period of active build-out that has since levelled off. Claims filed today are competing against a denser prior-art base than five years ago, particularly around garbage collection and write-amplification reduction.
One 2004 filing still shapes the field
US20040186946A1's 356 citations — more than double the second most-cited record's 146 — indicates that core flash file system concepts from two decades ago remain the baseline that later garbage collection and endurance claims are drafted around.
Claims are drafted as data-processing logic
With 593 of 601 records in G06F against 76 in G11C, most protection in this field is won on the software/firmware side of the controller — translation tables, scheduling, error handling — rather than on the memory-cell hardware itself.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to ssd controllers and flash management, with the prior art for and against each one.
| Assignee | Co-assignee | Shared families |
|---|---|---|
| Samsung Electronics Co., Ltd. | Korea Advanced Institute of Science and Technology (KAIST) | 4 |
| LSI Corporation | WERNER JEREMY ISAAC NATHANIEL | 3 |
| LSI Corporation | COHEN EARL T | 3 |
| LSI Corporation | BARYUDIN LEONID | 3 |
| SK hynix Inc. | Yonsei University Industry-Academic Cooperation Foundation | 2 |
| LSI Corporation | TOMLIN ANDREW JOHN | 2 |
| LSI Corporation | CANEPA TIMOTHY LAWRENCE | 2 |
| Western Digital Technologies, Inc. | Skyera, LLC | 1 |
Only 10 co-assignee pairs appear across the corpus; the strongest links Samsung Electronics with the Korea Advanced Institute of Science and Technology (4 shared families), and LSI with two individual named inventors (3 each) — pointing to university partnerships and inventor-retained credit rather than broad joint ventures.
Who holds the claim space, and where it opens up
Recent-year momentum sits near zero across every major named assignee, which — given the 18-month publication lag — reads as pending applications not yet published rather than an actual retreat from the field.
Zero is not the same as absent
Samsung Electronics, Western Digital, SK hynix, LSI, Micron and Seagate all show 0 filings in the most recent tracked year, with Micron down -100% year-over-year. Given the roughly 18-month gap between filing and publication, this reflects the data cut-off more than a slowdown in R&D.
Flash file system claims still frame the space
The most-cited record in the corpus is a foundational flash file system filing, not a recent controller patent. New entrants drafting garbage collection or wear-leveling claims are working in territory this filing has already shaped for two decades.
Partnerships are narrow and specific
Co-assignment is uncommon in this corpus. Where it appears, it links a single corporate assignee to a university lab or named individual inventor rather than connecting two competing manufacturers — Samsung Electronics and the Korea Advanced Institute of Science and Technology being the clearest example.
| Assignee | Recent year | YoY |
|---|---|---|
| Samsung Electronics Co., Ltd. | 0 | — |
| Western Digital Technologies, Inc. | 0 | — |
| SK hynix Inc. | 0 | — |
| LSI Corporation | 0 | — |
| Micron Technology, Inc. | 0 | -100% |
| Seagate Technology LLC | 0 | — |
| Silicon Motion Technology Corporation | 0 | — |
| Alibaba Group Holding Limited | 0 | — |
Where to take this analysis
The dataset points to specific next steps depending on whether the goal is freedom-to-operate, portfolio strategy or new claim drafting.
Check freedom-to-operate against the anchor filings
Before drafting garbage collection or write-amplification claims, run a clearance search against the most-cited records in this corpus — several remain live reference points that later filings had to design around.
Explore prior art in EurekaTrack the publication-lag window
With every major assignee showing 0 filings in the latest year, the real test of whether activity has slowed is what publishes over the next 12–18 months, not the current snapshot.
Set up monitoring in EurekaScope claims toward the under-claimed branches
Host-aware FTL synchronization and AI-driven endurance prediction show thinner coverage than core garbage collection claims — a narrower first claim there faces less prior art density.
Map white space in EurekaCommon questions about SSD controller patents
The ranking in this corpus is dominated by established storage manufacturers rather than newer entrants — the leading assignees include Samsung Electronics, Western Digital, SK hynix, LSI, Micron and Seagate. All six show zero filings in the most recent tracked year, which given the roughly 18-month publication lag likely reflects pending applications not yet public rather than a real exit from the space. Ranking by patent family, rather than raw document count, gives a fairer picture since it removes the effect of continuation filings and multi-jurisdiction duplicates.
A flash translation layer (FTL) is the firmware layer inside an SSD that maps logical block addresses a host operating system uses to the physical NAND pages where data actually lives, handling wear leveling, garbage collection and bad-block management along the way. Because NAND flash degrades with every write and cannot be overwritten in place, the FTL is where most of the engineering trade-offs between endurance, performance and write amplification get made — which is why 593 of the 601 records in this dataset classify under G06F, the electric digital data processing subclass, rather than under memory-hardware classes.
Filing volume rose from 34 records in 2017 to a peak of 62 in 2020, then held near that level with 58 filings at the 2022 midpoint — a pattern that reads as flat rather than growing. The apparent drop toward the most recent years is largely an artefact of publication lag: patents filed in the last 18 months typically have not published yet, so the final one to two years in any filing trend chart will always look lower than they eventually turn out to be. Taken together, the trend suggests a mature, steady claim space rather than one still in rapid build-out.
US20230051806A1, filed by SK hynix NAND Product Solutions Corp. (dba Solidigm) and published February 2023, covers synchronizing a host-side flash translation layer with the drive's own FTL to reduce write amplification and over-provisioning. It works by mapping logical host bands to physical bands on the drive and tracking data validity levels at the host level, which is then used to optimize garbage collection and trim operations run by the host FTL software stack. The claim scope centres specifically on host-drive FTL coordination, not on garbage collection or write amplification reduction in general, which leaves standalone drive-side optimization approaches outside its direct reach.
Relative to the dense core claim territory around garbage collection, write amplification and error correction, this corpus shows thinner coverage in host-aware FTL synchronization, AI or deep-learning-driven endurance prediction, and cross-layer quality-of-service scheduling that spans host and drive. Only 17 records in the entire dataset touch AI-based computing classifications (G06N), despite one of the most-cited records in the corpus being a deep-neural-network-based SSD performance optimization patent — suggesting the concept is cited heavily but not yet densely claimed. A narrowly scoped first claim in these adjacent branches would face materially less prior art density than one filed against core garbage collection or wear-leveling mechanics.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.