Fastest
Eureka on the web
When you want the answer in the next five minutes.
The agent works the prompt against patents and technical literature, citing every source.
Run your analysis now →https://www.patsnap.com/resources/blog/rd-blog/standard-cell-and-design-technology-co-optimization-patent-landscape/ · Patsnap · data cut-off 2026-07-31 · downloaded from the live page
Advanced Logic Devices · Patent LandscapeStandard cell and design technology co-optimization patents: who is filing, and where the claim space is still open
- Concentrated but not closed. the top 5 assignees hold 39.8% of all 1,470 records in scope, yet a long tail of single- and low-filing entrants still files every year.
- Filing is still climbing, not cooling. 2021-to-2024 filings rose 11% (85 to 94), and 2024 is the last year the data can call complete once publication lag is accounted for.
- Software claims dominate the hardware. G06F digital-processing claims touch 68.4% of records, well ahead of H01L semiconductor-device claims at 43.4%, showing how much of this field is decided in EDA methodology, not silicon.
1,470
Published Records
40%
Top-5 Share of All Records
+11%
Filing Growth 2021→2024
US
Leading Jurisdiction
Filing growth compares 2021 (85 records) with 2024 (94) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 1,470 records in scope (CR5), not by the ranked leaders only.
Published byPatsnap Research··8 min readSourced from Patsnap Eureka
Field Overview
What this landscape covers
Standard cell and design technology co-optimization (DTCO) sits at the junction of physical design methodology and process integration: cell-height reduction, track-count scaling, pin accessibility and library characterization are the levers that determine whether a shrinking node actually yields usable power-performance-area gains. The search set combines standard-cell and DTCO terminology with the routing- and scaling-specific vocabulary — track count, pin accessibility, routing congestion, power performance area, scaling boosters and library characterization — that separates a claim about a specific optimization technique from a generic semiconductor filing.
1,470 records fall inside this scope, filed between 2015 and mid-2026. The mix of receiving offices — heavily weighted to the United States, with meaningful PCT, European, Indian, Taiwanese and Australian filings — points to a field where the core methodology work is filed close to where design tools and foundry customers sit, then extended internationally through a smaller set of follow-on filings.
Filing activity and technology composition, 2015-2026
Source: Patsnap Eureka. Assignee ranking and totals. Derived from a Patsnap search on Standard Cell and Design Technology Co Optimization covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
Let an AI agent run this analysis on your own technology
Pick a task. Every answer cites the patents behind it.
10,000 free credits to start
The Data
Filing trends and technology composition
Two views of the same 1,470 records: how filing volume has moved year over year, and which IPC subclasses the claims actually sit in. Because a single record can carry several IPC codes, the class shares below sum to well over 100% of the record total — that is expected, not an error.
Filing activity, 2017-2026
Filings ran from 88 in 2017 to a peak of 109 in 2018, then held in a broad band before the 2021-to-2024 span rose 11% (85 to 94). 2025 and 2026 read low, but that reflects the roughly 18-month lag between filing and publication rather than a genuine drop-off; 2024 is the most recent year that can be read as complete.
Technology composition by IPC subclass
G06F (electric digital data processing) touches 68.4% of the 1,470 records, confirming that most of the inventive activity here is claimed as design methodology rather than device structure. H01L (semiconductor devices) follows at 43.4%, with H10W, H10D, H03K, G11C, H10B and G06N each covering a narrower slice — from routing and pulse-technique circuits down to memory device manufacture and AI-based computing methods.
Shares are the percentage of the 1,470 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Source: Patsnap Eureka. Filing trend and technology composition. Derived from a Patsnap search on Standard Cell and Design Technology Co Optimization covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.
Go deeper on Standard Cell and Design Technology Co Optimization with Eureka
This page is one run against one query. Ask Eureka your own question about standard cell and design technology co optimization and every answer comes back with the patent numbers behind it.
Try EurekaKey Patents
Representative and most-cited filings
Representative Filing
US9165102B1 — Routing standard cell-based integrated circuits
ASCALE TECHNOLOGIES LLC
This disclosure describes a multi-height routing cell and utilization of the multi-height routing in an integrated circuit to reduce routing congestion in a standard cell design floorplan. The multi-height routing cell includes a bypass connection, or a tunnel, that routes a signal through a non-routing layer and under an impeding power rail. Bypass connectors on both sides of the connection provide connection points for standard cells on opposite sides of the impeding power rail, giving a route underneath it and, in turn, reducing routing congestion in the standard cell design.Filed by Ascale Technologies LLC, published 2015-10-20.
Most-cited records in this landscape
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US6536028B1 | Standard block architecture for integrated circuit design | 459 |
| 2 | US6249902B1 | Design hierarchy-based placement | 456 |
| 3 | US5880598A | Tile-based modular routing resources for high density programmable logic device | 396 |
| 4 | US5777360A | Hexagonal field programmable gate array architecture | 339 |
| 5 | US5838583A | Optimized placement and routing of datapaths | 324 |
| 6 | US5822214A | CAD for hexagonal architecture | 299 |
| 7 | US6557145B2 | Method for design optimization using logical and physical information | 290 |
| 8 | US7441211B1 | Gate-length biasing for digital circuit optimization | 288 |
| 9 | US6026223A | Advanced modular cell placement system with overlap remover with minimal noise | 269 |
| 10 | US6407434B1 | Hexagonal architecture | 257 |
Citation counts favour older filings simply because they have had longer to accumulate citations inside a searched corpus; treat this table as a signal of influence on the field's foundational architecture, not as a ranking of current importance.
Each row carries its publication number; clicking a row searches Eureka by that number.
Source: Patsnap Eureka. Citation counts and representative records. Derived from a Patsnap search on Standard Cell and Design Technology Co Optimization covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
Run it yourself
Put your own technology through the same analysis
Where to run it
For builders
MCP server & REST API
When it has to run inside your own pipeline.
Patent search, landscape analysis and assignee resolution as MCP tools. Drop them into any agent framework, or call REST directly.
Browse MCP servers →Insights
What the numbers mean for a filing decision
Three figures worth reading together: how concentrated ownership is, how the field's growth actually looks once the lag is accounted for, and where the claim language clusters.
Concentration
39.8%
of 1,470 records held by the top 5 assignees
The top of the field is dense, the rest is open
39.8% of all records in scope belong to just five assignees, and the top 10 combined hold 56.2%. That leaves close to half the field spread across 90 further ranked companies plus unranked filers, which is a meaningful amount of room for a new entrant that is not trying to out-file the leaders directly.
Based on the 100-company assignee ranking.
Growth
+11%
filing growth, 2021 to 2024
Momentum is still building, not fading
Filings grew from 85 in 2021 to 94 in 2024, an 11% rise over that span. The apparent decline in 2025 and 2026 in the raw trend line is a publication-lag artefact, not a real slowdown; 2024 is the most recent year the trend can be read at face value.
2018 remains the single peak year at 109 filings.
Claim mix
68.4%
of records touch G06F
This field is decided in methodology, not structure
G06F (digital data processing) appears in 68.4% of records against 43.4% for H01L (semiconductor devices), meaning most inventive value here is being captured as design and optimization methodology rather than as a physical device claim. A company defending only device architecture is exposed on the methodology side.
Class shares sum above 100% because records carry multiple IPC codes.
Eureka AI Agent
Looking for what nobody has claimed yet?
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to standard cell and design technology co optimization, with the prior art for and against each one.
Source: Patsnap Eureka. Co-assignee relationships and derived observations. Derived from a Patsnap search on Standard Cell and Design Technology Co Optimization covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
Who's Filing
Assignee landscape and recent momentum
The ranking covers 100 companies, from foundries and IDMs through EDA vendors, and is genuinely long-tailed beneath the leaders. Recent-year momentum figures show even leading filers pulling back sharply year over year, which is consistent with the publication lag rather than a real stop in activity.
Leader
157
records, the single largest filer
One filer sits well clear of the field
The leading assignee's 157 records put it far ahead of fifth place at 69 and tenth place at 38, a gap that reflects sustained, multi-year filing rather than a single burst.
Leader vs fifth place: 157 vs 69.
Mid-field
69 → 38
records, fifth to tenth place
The drop-off after the leader is gradual, then steep
Fifth place holds 69 records and tenth place 38 — a real but gradual decline that flattens further down the ranking, consistent with a field where several large device and design-tool companies file steadily alongside a long tail of smaller or one-off filers.
Top 10 combined: 826 records, 56.2% of scope.
Collaboration
10
co-assignee pairs identified
Collaboration filing is limited and mostly intra-group
Only 10 co-assignee pairs appear in the dataset, and the strongest ones link a parent company to its own subsidiary or regional entity rather than to an external partner, suggesting most invention here is filed solo rather than through joint development deals.
Strongest pair recorded 13 shared filings.
Recent-year filing momentum by assignee
| Assignee | Recent year | YoY |
|---|---|---|
| Qualcomm Inc | 2 | -85% |
| Tokyo Electron Ltd | 1 | — |
| Samsung Electronics Co Ltd | 0 | -100% |
| Taiwan Semiconductor Manufacturing Co Ltd | 0 | -100% |
| PDF Solutions Inc | 0 | — |
| LSI Corporation | 0 | — |
| Synopsys Inc | 0 | -100% |
| International Business Machines Corporation | 0 | — |
Source: Patsnap Eureka. Assignee-level momentum. Derived from a Patsnap search on Standard Cell and Design Technology Co Optimization covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
What's Next
Where to take this from here
The landscape points to a field that is still filing actively at the leader level while leaving room in specific methodology branches. Two practical next steps follow from that.
Check freedom-to-operate before filing near the top-cited architecture patents
The most-cited records in this set date back to the late 1990s and shape the baseline routing and placement architecture that later filings build on; a new filing that touches multi-height cell routing or tile-based routing resources should be checked against them first.
Run a freedom-to-operate check in EurekaTrack the leading assignees' recent filings directly, not just their totals
Because 2025-2026 filings are still being published, ranking totals understate the current pace of the leaders; monitoring new publications from the top assignees gives an earlier read than waiting for the ranking to update.
Set up assignee monitoring in EurekaSource: Patsnap Eureka. Forward-looking reading of the same dataset. Derived from a Patsnap search on Standard Cell and Design Technology Co Optimization covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
FAQ
Common questions about this landscape
The leading assignee in this dataset holds 157 records, well ahead of fifth place at 69 and tenth place at 38. The top 5 assignees combined account for 39.8% of all 1,470 records in scope, and the top 10 account for 56.2%. That leaves a substantial share of the field spread across a long tail of smaller filers, so leadership in raw count does not mean the field is closed to new entrants.
Filing grew 11% from 85 records in 2021 to 94 in 2024, and 2024 is the most recent year that can be read as a complete data point. The lower counts shown for 2025 and 2026 reflect the roughly 18-month gap between when a patent is filed and when it publishes, not an actual drop in filing activity. Treat any apparent decline in the last one to two years of the trend line with caution for that reason.
US9165102B1, filed by Ascale Technologies LLC and published in 2015, claims a multi-height routing cell that uses a bypass connection, or tunnel, to route a signal through a non-routing layer underneath an impeding power rail. The bypass connectors on either side let standard cells on opposite sides of that power rail connect to each other. Its practical effect is reducing routing congestion in a standard cell floorplan, which makes it a reference point for anyone filing on multi-height cell or power-rail bypass routing techniques.
Each patent record can be classified under several International Patent Classification (IPC) subclasses at once, so the same record is counted in more than one category. G06F, the largest category, covers 68.4% of the 1,470 records on its own, and H01L covers 43.4%, so the two alone already exceed 100% combined. This is standard for IPC-based composition analysis and should not be read as an error in the data.
Based on relative claim density across the technology mix, comparatively thin areas include AI-assisted library characterization, cell-height reduction below current track counts, pin-accessibility scoring tied to scaling boosters, layout-stage routing-congestion prediction, and power-performance-area co-optimization specific to memory macros. These sit adjacent to the densely claimed core routing and placement architecture rather than replacing it, which is why they read as narrower, more specific claim opportunities rather than wide-open ground.
Only 10 co-assignee pairs appear across the 1,470 records, and the strongest pairs link a parent company to its own subsidiary or regional affiliate rather than to an unrelated third party. That suggests most patents in this space are filed by a single corporate group working alone rather than through cross-company joint development. A new entrant looking for a co-development partner should not expect to find many precedent joint-filing structures to model against.
Answers are grounded in the same dataset. Derived from a Patsnap search on Standard Cell and Design Technology Co Optimization covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
Research Standard Cell and Design Technology Co Optimization in depth with Eureka
Go past this page: query the whole standard cell and design technology co optimization corpus yourself, in your own scope.
Every answer comes back with patent numbers you can open.
Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company's registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.