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Run your analysis now →Filing growth compares 2021 (234 records) with 2024 (92) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 2,934 records in scope (CR5), not by the ranked leaders only.
Supercomputing patent activity, as captured by this search across 2,934 records published between 2015 and the 2026 data cut-off, centres on processor architecture, memory hierarchy and cache coherence claims rather than on any single hardware form factor. The search string ties supercomputer and massively-parallel-computing terms to specific implementation mechanics — compute kernel, task parallelism, memory access — which is why the technology composition below skews so heavily toward general digital data processing rather than a narrow supercomputer-specific class.
Filing activity rose through the late 2010s, peaked in 2021, and has declined since — a pattern consistent with a wave of architecture claims being filed early in a platform cycle and tapering as the core mechanics get settled by a small group of large filers. Recent-year counts are undercounted because publication trails filing by roughly 18 months, so the 2025-26 dip should not be read as a real slowdown.
Two views of the same 2,934-record dataset: how filing volume has moved year over year, and which IPC subclasses carry the claim density behind the supercomputing label.
Filings rose from 163 in 2017 to a peak of 234 in 2021, then fell to 92 by 2024 — a 61% decline over that three-year window. 2025 and 2026 counts are partial because publication lags filing by roughly 18 months; they should not yet be read as a continued fall.
G06F (electric digital data processing) appears in 74.4% of the 2,934 records in scope, far ahead of H04L digital information transmission at 14.3% and H05K printed circuits and assemblies at 10.1%. Because records can carry multiple IPC classes, these shares sum to more than 100% and should be read against the full record count, not against each other as parts of a whole.
Shares are the percentage of the 2,934 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
This page is one run against one query. Ask Eureka your own question about supercomputing patent landscape and every answer comes back with the patent numbers behind it.
Try EurekaA Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaOPS-scale computing, at decreased cost, power and footprint, and that allows for a maximum packaging density of processing nodes from an interconnect point of view. The Supercomputer exploits technological advances in VLSI that enables a computing model where many processors can be integrated into a single Application Specific Integrated Circuit (ASIC), with each ASIC computing node comprising a system-on-chip utilizing four or more processors on one die, each having full access to system resources and enabling adaptive partitioning of processors to compute or messaging I/O functions.Filed by GLOBALFOUNDRIES INC., published 2011-09-08 — illustrates the system-on-chip, multi-processor-per-die approach that recurs across the dataset's densest architecture claims.


| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US5999525A | Method for video telephony over a hybrid network | 1,229 |
| 2 | US6335927B1 | System and method for providing requested quality of service in a hybrid network | 1,203 |
| 3 | US5867494A | System, method and article of manufacture with integrated video conferencing billing in a communication syste… | 1,181 |
| 4 | US20090216910A1 | Computing infrastructure | 1,026 |
| 5 | US20100332373A1 | System and method for participation in energy-related markets | 1,023 |
| 6 | US6754181B1 | System and method for a directory service supporting a hybrid communication system architecture | 992 |
| 7 | US6075938A | Virtual machine monitors for scalable multiprocessors | 979 |
| 8 | US6731625B1 | System, method and article of manufacture for a call back architecture in a hybrid network with support for i… | 909 |
| 9 | US20020064149A1 | System and method for providing requested quality of service in a hybrid network | 874 |
| 10 | US20110219208A1 | Multi-petascale highly efficient parallel supercomputer | 827 |
Citation counts favour older filings simply because they have had more time to accumulate citations within the searched corpus — treat them as a signal of influence on subsequent filers, not as a measure of current commercial relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
When you want the answer in the next five minutes.
The agent works the prompt against patents and technical literature, citing every source.
Run your analysis now →When it has to run inside your own pipeline.
Patent search, landscape analysis and assignee resolution as MCP tools. Drop them into any agent framework, or call REST directly.
Browse MCP servers →The numbers point to a field where a small group of large filers set the architecture baseline early, while the surrounding claim space — bioinformatics-adjacent and business-process-adjacent uses of the same parallel-compute mechanics — remains comparatively open.
The top 5 ranked assignees combine for 42.4% of all 2,934 records in scope, and the top 10 extend that to 49.6%. The leader alone accounts for 554 records against a fifth-place figure of 52 and a tenth-place figure of 39 — a steep drop-off that leaves most of the ranked list holding a handful of filings each.
Filing volume fell 61% from its 2021 peak of 234 to 92 in 2024, the most recent year that can be treated as complete. That decline sits alongside near-zero recent-year activity from several of the largest historical filers, suggesting the core architecture claims from this wave have already been staked out rather than that interest in the space has ended.
G06F (electric digital data processing) touches nearly three-quarters of the 2,934 records, with H04L transmission and H05K printed-circuit classes trailing well behind. The thinner classes — G16B bioinformatics at 3.0% and G06Q business data processing at 2.3% — show where parallel-compute mechanics have been applied to a specific domain far less often than to general architecture.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to supercomputing patent landscape, with the prior art for and against each one.
| Assignee | Co-assignee | Shared families |
|---|---|---|
| International Business Machine Corporation (IBM) | GIAMPAPA MARK E | 9 |
| International Business Machine Corporation (IBM) | GARA ALAN G | 9 |
| International Business Machine Corporation (IBM) | COTEUS PAUL W | 9 |
| International Business Machine Corporation (IBM) | CHEN DONG | 9 |
| Global Supercomputing Corp | ELLIOTT ISAAC K | 9 |
| Global Supercomputing Corp | EASTEP GUIDO M | 9 |
| International Business Machine Corporation (IBM) | TAKKEN TODD E | 7 |
| International Business Machine Corporation (IBM) | HEIDELBERGER PHILIP | 7 |
Only 10 co-assignee pairs appear in the dataset, and the strongest links all sit around IBM-affiliated inventor teams filing three to a group of nine shared records — co-development across separate corporate entities is the exception here, not the pattern.
Recent-year momentum diverges sharply from historical share: several of the largest filers by cumulative record count show little or no activity in the latest year, while one major processor vendor still shows a measurable, if declining, filing rate.
International Business Machine Corporation's 554 records dwarf the fifth-place figure of 52, and its inventor teams also anchor most of the dataset's few co-assignee links. Its latest-year momentum reads at zero, consistent with a filer that established its architecture claims early and has since moved on to later-stage or unpublished work.
NVIDIA shows 6 records in the latest year against a 75% year-on-year drop — still active, unlike several peers that show zero, but clearly past whatever filing rate produced its historical share.
Intel's latest-year count sits at zero, a 100% year-on-year drop, and the same is true of several other historically significant filers in this dataset. That does not necessarily mean disengagement from the technology — it is as consistent with a shift to filing under different search terms or classifications as with an actual pullback.
| Assignee | Recent year | YoY |
|---|---|---|
| NVIDIA Corp | 6 | -75% |
| International Business Machine Corporation (IBM) | 0 | — |
| Intel Corp | 0 | -100% |
| ICAT LLC | 0 | — |
| Illumina Inc | 0 | — |
| Global Supercomputing Corp | 0 | — |
| Interactic Holdings LLC | 0 | — |
| Sun Microsystems, Inc. | 0 | — |
The dataset points to specific next steps depending on whether the goal is freedom-to-operate, white-space filing, or tracking a competitor's next move.
With 554 records concentrated in one assignee and dense IBM-affiliated co-filing, any new architecture claim touching processor partitioning, ASIC packaging density or messaging I/O should be checked against that body of prior art before drafting.
Run a freedom-to-operate search in EurekaG16B and G06Q carry the thinnest overlap with the core supercomputing classes at 3.0% and 2.3% of records respectively, which is where a first claim is less likely to collide with dense prior art.
Explore white space in EurekaNVIDIA's continued, if reduced, filing rate stands out against near-zero recent activity from historically larger filers, and is worth monitoring for where the next wave of claims will land.
Set up assignee monitoring in EurekaInternational Business Machine Corporation is the largest filer in this dataset by a wide margin, with 554 records against a fifth-place figure of 52 and a tenth-place figure of 39. That gap means the field is concentrated at the top: the top 5 assignees together hold 42.4% of all 2,934 records in scope, and the top 10 hold 49.6%. Behind that leading group sits a long tail of assignees with only a handful of filings each, so a single company's dominance does not mean the surrounding claim space is closed.
Filing rose through the late 2010s, peaked at 234 records in 2021, and had fallen to 92 by 2024 — a 61% decline over that three-year span. However, publication lags filing by roughly 18 months, so 2025 and 2026 figures in any dataset are always undercounted and should not be read as evidence of a continuing drop. The more reliable read is that the wave of foundational architecture filing that built up to 2021 has largely settled, with several major historical filers showing near-zero activity in the latest complete year.
G06F, the electric digital data processing class, appears in 74.4% of the 2,934 records in scope, making it by far the dominant classification. H04L (digital information transmission) and H05K (printed circuits and assemblies) follow at 14.3% and 10.1% respectively, while AI-model computing (G06N) sits at 6.4%. Because a single patent record can carry multiple IPC classes, these percentages overlap rather than summing to 100%, and they should be read against the full 2,934-record base rather than against each other.
The thinnest overlap with core supercomputing architecture claims shows up in domain-specific applications rather than in the architecture itself: bioinformatics (G16B) touches only 3.0% of records and business/commerce data processing (G06Q) only 2.3%. That suggests parallel-compute and memory-hierarchy mechanics have been claimed extensively in general-purpose form but far less often when tied to a specific application domain, which is where a first claim is less likely to collide with dense prior art from the leading filers.
US20110219208A1, filed by GLOBALFOUNDRIES INC., describes a multi-petascale parallel supercomputer built from system-on-chip ASICs with four or more processors integrated onto a single die, each with full access to system resources and adaptive partitioning between compute and messaging I/O functions. It is representative of a recurring pattern in this dataset: claims anchored in packaging density, interconnect topology and per-node resource allocation rather than in software algorithms alone. Anyone drafting in adjacent territory should treat multi-processor-per-die packaging and adaptive I/O partitioning as claim elements likely to have prior art coverage.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company's registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.