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Run your analysis now →https://www.patsnap.com/resources/blog/rd-blog/threshold-voltage-instability-in-sic-power-devices-patent-landscape/ · Patsnap · data cut-off 2026-07-31 · downloaded from the live page
Patent Landscape · Discrete & Analog DevicesThreshold voltage instability and bias temperature instability patents: who holds the ground
- 41.2% of the field sits with five assignees. 135 of 328 records in scope belong to the top five filers, with a long tail of single- and low-count entrants behind them.
- Filing activity has cooled since its 2022 peak. Annual filings ran from 19 in 2017 to a high of 21 in 2022, then declined toward 1 in 2026 (a partial, not-yet-complete year).
- Measurement and memory classes rival the device class itself. G01R measurement claims (23.5%) and G11C memory claims (21.6%) each appear in roughly a quarter of records alongside H01L device claims (32.3%).
328
Published Records
41%
Top-5 Share of All Records
-69%
Filing Growth 2021→2024
US
Leading Jurisdiction
Filing growth compares 2021 (16 records) with 2024 (5) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 328 records in scope (CR5), not by the ranked leaders only.
Published byPatsnap Research··7 min readSourced from Patsnap Eureka
Overview
What this landscape covers
This landscape tracks 328 published records filed against threshold voltage instability, bias temperature instability (BTI) and related gate bias drift language, together with qualification test methods used to detect and quantify the effect. The scope spans positive and negative bias temperature instability, measurement-delay artefacts in test methodology, and the device and circuit structures used to monitor drift over time. Records run from 2015 through the 2026 data cut-off, with the most recent year necessarily undercounted because publication lags filing by roughly eighteen months.
The dataset draws on assignee filings, IPC classification and receiving-office data to show where claim density is highest, which organisations have built the deepest filing positions, and where the technology composition thins out into adjacent measurement and memory disciplines rather than the core device structure alone.
Filing activity and technology composition, 2015–2026
Source: Patsnap Eureka. Assignee ranking and totals. Derived from a Patsnap search on Threshold Voltage Instability in SiC Power Devices covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
The Numbers
Filing trends and technology composition
Two views of the same 328-record dataset: the filing trend by year, and the IPC subclasses that recur across records.
Filing trend, 2017–2026
Annual filings opened at 19 in 2017, climbed to a peak of 21 in 2022, and have declined since toward 1 in 2026 — a partial year that will revise upward as later publications land. The flat-to-declining shape through the midpoint year suggests the core patenting wave for BTI detection and mitigation techniques has already crested, though qualification-methodology filings may still be working through the pipeline.
Technology composition by IPC subclass
H01L (semiconductor devices) anchors the field at 32.3% of the 328 records in scope, but G01R (electric and magnetic measurement, 23.5%) and G11C (static and digital memories, 21.6%) are close behind — a reminder that a large share of this landscape is about detecting and characterising drift, not just the device structures that exhibit it. H03K pulse and logic circuits (17.7%) and H10D general semiconductor devices (14.9%) round out the recurring classes; because records can carry multiple IPC codes, these shares sum to more than 100%.
Shares are the percentage of the 328 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Source: Patsnap Eureka. Filing trend and technology composition. Derived from a Patsnap search on Threshold Voltage Instability in SiC Power Devices covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.
Go deeper on Threshold Voltage Instability in SiC Power Devices with Eureka
This page is one run against one query. Ask Eureka your own question about threshold voltage instability in sic power devices and every answer comes back with the patent numbers behind it.
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The most-cited prior art in this space
Representative Filing
US8456247B2 — Monitoring negative bias temperature instability (NBTI) and/or positive bias temperature instability (PBTI)
INTERNATIONAL BUSINESS MACHINES CORPORATION
A ring oscillator circuit for measurement of negative bias temperature instability effect and/or positive bias temperature instability effect includes a ring oscillator having first and second rails, and an odd number (at least 3) of repeating circuit structures. Each repeating structure includes an input and output terminal, a first p-type transistor with a gate and drain-source terminals coupled to the first rail and selectively to the output, and a corresponding n-type transistor coupled to the second rail.Filed by International Business Machines Corporation; issued 2013-06-04.
Highest-citation records in scope
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US8432751B2 | Memory cell using BTI effects in high-k metal gate MOS | 188 |
| 2 | US6731179B2 | System and method for measuring circuit performance degradation due to PFET negative bias temperature instabi… | 99 |
| 3 | US20100107166A1 | Scheduler for processor cores and methods thereof | 90 |
| 4 | US20030189465A1 | System and method for measuring circuit performance degradation due to PFET negative bias temperature instabi… | 85 |
| 5 | US20130015876A1 | Apparatus and method for measuring degradation of CMOS VLSI elements | 55 |
| 6 | US6456104B1 | Method and structure for in-line monitoring of negative bias temperature instability in field effect transist… | 54 |
| 7 | US20140077313A1 | Transistor device and fabrication method | 51 |
| 8 | US20090189703A1 | Circuits and design structures for monitoring NBTI (negative bias temperature instability) effect and/or PBTI… | 51 |
| 9 | US20030233624A1 | Method for predicting the degradation of an integrated circuit performance due to negative bias temperature i… | 42 |
| 10 | US20130021864A1 | Array Power Supply-Based Screening of Static Random Access Memory Cells for Bias Temperature Instability | 39 |
Citation counts are drawn from the searched corpus only and skew toward older filings; treat them as a signal of influence within this dataset, not a ranking of current technical relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
Source: Patsnap Eureka. Citation counts and representative records. Derived from a Patsnap search on Threshold Voltage Instability in SiC Power Devices covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
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What the data means for filing strategy
Three read-throughs from the concentration, timing and classification data above.
Concentration
41.2% / 135 records
top 5 of 328
The top of the field is dense, the rest is thin
Five assignees hold 135 of the 328 records in scope, a 41.2% share, and the top ten push that to 58.8%. Below that line the ranking runs to 99 companies total, most holding only a handful of families — a classic concentrated-core, long-tail structure rather than a fragmented field.
Ranked leaders, not a top-50 or top-100 list.
Timing
2022 peak, 21 filings
midpoint year
Filing has already crested
Annual counts ran 19 in 2017 and reached their high of 21 in 2022 before declining toward the present. With 2022 as the midpoint showing the peak rather than continued growth, new entrants are filing into a field whose core structural claims were largely staked earlier in the window.
2026 figures are partial; publication lag typically runs about 18 months.
Classification
23.5% + 21.6%
measurement + memory share
Detection methodology is as contested as the device itself
G01R measurement claims and G11C memory claims each touch roughly a fifth to a quarter of the 328 records, nearly matching H01L device claims at 32.3%. A filer focused only on device structure risks missing where measurement and characterisation claims already sit.
Shares sum above 100% because records carry multiple IPC codes.
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Looking for what nobody has claimed yet?
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to threshold voltage instability in sic power devices, with the prior art for and against each one.
Source: Patsnap Eureka. Co-assignee relationships and derived observations. Derived from a Patsnap search on Threshold Voltage Instability in SiC Power Devices covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
Players
Who is filing, and where the openings are
The leader board is short and the drop-off after the top ten is sharp; recent-year momentum has slowed across nearly every named assignee.
Leader
39 records
leading assignee
One filer well ahead of the field
The leading assignee holds 39 records against a fifth-place count of 16 and a tenth-place count of 9 — a steep early drop that marks a genuine leader rather than a cluster of near-equal filers.
Counted in patent families.
Momentum
1 filing, latest year
most active recent filer
Recent-year activity has gone quiet
Among the named assignees tracked for recent momentum, only one shows any filing at all in the latest year, and that count is a single record. The rest show zero, consistent with the broader decline from the 2022 peak.
Latest year is partial due to publication lag.
Collaboration
10 co-assignee pairs
cross-filing links
Cross-filing is limited and mostly internal
Ten co-assignee pairs appear in the dataset, and the strongest link — eight shared records — connects two entities within the same corporate group rather than an cross-company partnership. External collaboration on this specific problem is not yet a dominant pattern.
Pairs counted by shared record appearances.
Recent-year filing momentum by assignee
| Assignee | Recent year | YoY |
|---|---|---|
| Texas Instruments Inc. | 1 | — |
| International Business Machines Corporation | 0 | — |
| General Electric Company | 0 | — |
| Semiconductor Manufacturing International (Shanghai) Corporation | 0 | — |
| GlobalFoundries Inc. | 0 | — |
| Intel Corporation | 0 | — |
| Interuniversity Microelectronics Centre (imec) | 0 | — |
| Taiwan Semiconductor Manufacturing Co., Ltd. | 0 | -100% |
Source: Patsnap Eureka. Assignee-level momentum. Derived from a Patsnap search on Threshold Voltage Instability in SiC Power Devices covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
What's Next
Where to take this analysis
The dataset points to a field with a settled leadership core and a cooling filing rate — the open questions are about the edges, not the centre.
Map the measurement-claim overlap
G01R and G11C classes touch nearly half the dataset between them; a closer read of which assignees hold measurement claims versus device claims would clarify whether the two are typically bundled or filed separately.
Explore IPC overlap in EurekaWatch for a filing rebound
The decline toward 2026 is partly a publication-lag artefact. Tracking filings as later data lands will show whether 2022 was a genuine peak or a temporary lull.
Track filing trends in EurekaCheck freedom-to-operate against the leader's portfolio
With one assignee holding 39 of 328 records, any new filing in the core device-and-detection space should be checked against that portfolio specifically, not just the field average.
Run a freedom-to-operate check in EurekaSource: Patsnap Eureka. Forward-looking reading of the same dataset. Derived from a Patsnap search on Threshold Voltage Instability in SiC Power Devices covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
FAQ
Common questions about this landscape
Threshold voltage instability refers to a shift in a transistor's turn-on voltage over time, most commonly studied as negative or positive bias temperature instability (NBTI/PBTI) in MOS devices. Patent filings in this space cover both the underlying device or material fixes and the measurement circuits used to detect and quantify the drift. In this dataset the topic spans 328 records filed between 2015 and the 2026 cut-off, with claims split across semiconductor device structure, electrical measurement and memory-array classes.
The ranking covers 99 assignees, with a single leader holding 39 records against a fifth-place count of 16 and a tenth-place count of 9 — a sharp drop-off that marks a clear leader rather than several near-equal filers. The top five assignees together hold 135 of the 328 records in scope, 41.2% of the field, and the top ten hold 58.8%. Below the top ten the field spreads into a long tail of low-count filers.
Filing activity has slowed. Annual counts opened at 19 in 2017, rose to a peak of 21 in 2022, and have since declined toward 1 in 2026 — though that final year is partial and will revise upward as later filings publish, since publication typically lags filing by around 18 months. Treat the most recent one to two years of any trend chart in this space as understated rather than as evidence of a sudden drop-off.
US8456247B2 covers a ring oscillator circuit for measuring NBTI and/or PBTI effects, using an odd number of repeating p-type and n-type transistor structures across two rails. It is one of the most-cited records in this dataset and represents a specific circuit-level detection approach rather than a broad claim over BTI measurement generally. Anyone designing a monitoring circuit in this space should review its specific transistor-and-rail architecture rather than assume it blocks all ring-oscillator-based drift detection.
The clearest gaps sit adjacent to the dense core: qualification test method standardisation, measurement-delay artefact correction, and gate bias drift compensation specifically within memory arrays each show lower filing density than the core H01L device and G01R measurement classes. Cross-jurisdiction PCT filing is also comparatively light relative to US-only filing. These are branches worth checking for freedom to operate before assuming the space is fully occupied.
Answers are grounded in the same dataset. Derived from a Patsnap search on Threshold Voltage Instability in SiC Power Devices covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish.Run this in Eureka MCP
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company's registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.