A through-silicon via is a vertical electrical connection that passes completely through a silicon wafer or die, allowing stacked chips to be connected directly rather than through wire bonds around the edges. Forming one reliably requires solving several distinct engineering problems — etching a clean high-aspect-ratio hole (often with a Bosch-type deep etch process), lining it with barrier and seed layers, filling it void-free with copper, and then thinning the wafer to reveal the via — each of which generates its own claim territory. That is why TSV patents cluster heavily in process and structure classes like H01L rather than in a single narrow subclass.

Filing activity in this dataset concentrates among large integrated device manufacturers and foundries, including Taiwan Semiconductor Manufacturing Company, IBM, SK Hynix, GlobalFoundries, ChangXin Memory and Samsung Electronics. Co-assignee data shows that when two entities are named together on a filing, they are usually related subsidiaries of the same corporate group rather than separate companies collaborating, which suggests TSV process know-how is being protected internally rather than jointly developed.

Filings rose from 16 in 2017 to a peak of 35 in 2022 before declining in every subsequent year, reaching zero in the most recent partial year. Part of this drop is a publication-lag artifact, since patent applications typically take around 18 months to publish, so the last one to two years in any dataset understate real activity. The more reliable read is that after several years of active filing, the core process steps — etch, line, fill, thin, reveal — are heavily claimed, pushing new work toward adjacent structures rather than the foundational process itself.

The IPC composition points to several under-claimed branches relative to the dominant H01L cluster: MEMS-integrated TSV structures (B81B, B81C) and in-line stress or electrical measurement techniques (G01R) each register in only the low teens out of 474 total records. Keep-out zone design rules tied to specific crystal orientations, and void-free plating chemistry variants, also appear less saturated than the core etch-and-fill process claims. These branches are worth a targeted freedom-to-operate check before committing engineering resources.

The United States is by far the dominant filing venue in this dataset, accounting for 314 of 474 families, more than five times the volume filed in China (57) and roughly nine times the EPO total (34). Taiwan, South Korea and PCT/WIPO filings each account for a much smaller share. Any clearance or licensing analysis that does not include a thorough US search will miss the majority of the actively enforceable claim base in this field.