Wafer Defect Engineering Patents: Who Leads, Where the Gaps Are 2026
Wafer defect engineering and gettering patents: mapping who controls denuded-zone and intrinsic gettering claims
52.0% of all 2,146 records sit with just five assignees, so the core intrinsic-gettering and denuded-zone claim space is already tightly held. Filings peaked in 2017 at 36 and have since settled into a flatter pattern; the 2021-2024 window shows 13 filings in both years, a 0% change, indicating steady rather than accelerating activity. Treat 2025 and 2026 figures as provisional given the usual publication lag.
- 1SUMCO CORP414
- 2SHIN ETSU HANDOTAI CO LTD255
- 3SUNEDISON INC247
- 4GLOBALWAFERS CO LTD108
- 5SILTRONIC AG92
See the full wafer defect engineering and gettering analysis in Eureka
- The complete ranking, not just the top five
- Every IPC branch with its share of the corpus
- The most-cited records, and where claim space is still thin
Common questions on wafer defect engineering patents
What is intrinsic gettering in silicon wafer manufacturing?
Intrinsic gettering is a defect-control technique that uses a wafer’s own internal oxygen precipitation to trap metal contaminants away from the active device region. It typically works alongside formation of a denuded zone, a thin, defect-free layer near the surface where devices are actually built. The technique is documented as far back as the 1980s, with early process patents describing controlled annealing to form the denuded zone while relying on a deeper defect-rich layer for the gettering effect.
Who holds the most patents in wafer defect engineering and gettering?
Filing in this field is concentrated: the top five assignees together account for 52.0% of the 2,146 records in scope, and the top ten account for 68.1%. The leading assignee alone holds 414 records, well ahead of the fifth-placed company at 92, which points to a small group of established silicon wafer and semiconductor manufacturers driving most of the documented filing activity. Beyond the top ten, coverage spreads thinly across a long tail of smaller filers.
Is patent filing in this field still growing?
Filing has plateaued rather than grown in the most recent complete years: 2021 and 2024 both recorded 13 filings, a 0% change across that span, after an earlier peak of 36 filings in 2017. Because publication lags filing by roughly 18 months, figures for 2025 and 2026 are still incomplete and should not be read as a decline. The honest read is a mature field with steady rather than expanding filing activity.
Disclaimer. This analysis is based on Patsnap Eureka data drawn from a limited snapshot of global patent records and is provided for general information and reference only. Patent data carries inherent limitations — recent filings are under-counted because of publication lag, counts may be on a record or family basis, classification and applicant-name data may contain errors or duplicates, and the underlying search query defines the scope shown — so the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing here is an exhaustive prior-art, novelty, freedom-to-operate or validity search, nor does it constitute legal, financial or professional advice, and it should not be relied upon as such. Verify independently and review with qualified patent and legal professionals before acting on it.
Method: Filing trend and technology composition. Derived from a Patsnap search on Wafer Defect Engineering and Gettering covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish. Every share divides by all records in scope. Data: Patsnap Eureka. See the full landscape report.