Wafer Probe Card Patents: Who Leads, Where Filings Are Cooling 2026
- Filing has cooled since a 2018 peak of 51 records, with the midpoint year 2022 sitting at 21 — this is a mature claim space, not a growth one.
- The strongest co-filing relationship in the dataset pairs FormFactor with a single named inventor across 19 shared filings, pointing to a tight internal invention team rather than a broad partner network.
- Every top-momentum assignee shows 0 filings in the latest year, which is partly the ~18-month publication lag and partly a genuine slowdown in new probe-card claims from incumbents.
Filing growth compares 2021 (17 records) with 2024 (22) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 1,620 records in scope (CR5), not by the ranked leaders only.
What this landscape covers
Wafer probe cards and the test interfaces built around them sit at the boundary between semiconductor fabrication and final device qualification. This landscape tracks patent families where the claims center on contact resistance, planarity, probe mark quality, high pin count architectures, or high frequency signal path design — filtered against the core measurement and semiconductor-device IPC codes (G01R1, G01R31, H01L22). The corpus spans filings from 2015 through the mid-2026 data cut-off.
The dataset draws on 1,620 published patent families. Because publication typically lags filing by around eighteen months, the most recent one to two years in any trend line will understate actual filing activity — a fact that matters when reading the apparent decline toward the 2026 edge of the chart.
Filing trends and technology composition
Two views of the same corpus: how filing volume has moved year over year, and which IPC subclasses carry the claim density.
A peak, then a plateau
Filings rose from 25 in 2017 to a peak of 51 in 2018, then settled to a midpoint of 21 in 2022. The shape is consistent with a technology whose core mechanical and electrical approaches — planarization, MEMS probe fabrication, resistance measurement circuitry — were substantially claimed in the 2017-2019 window, with later years adding incremental refinements rather than new foundational architectures.
Concentration in electric measurement and semiconductor devices
G01R (electric and magnetic measurement) covers all but a handful of the 1,620 records, confirming the search scope; H01L (semiconductor devices) appears in 512 records, showing how tightly probe-card claims are bound to the device being tested. Smaller but non-trivial clusters sit in H05K (printed circuits, 135), H01R (connectors, 84) and C25D (electroplating and electroforming, 58) — the last of these tied to probe-tip fabrication and plating processes.
Shares are the percentage of the 1,620 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on Wafer Probe Cards and Test Interfaces with Eureka
This page is one run against one query. Ask Eureka your own question about wafer probe cards and test interfaces and every answer comes back with the patent numbers behind it.
Try EurekaThe patents everyone in this space cites
Evaluation method of probe mark of probe needle of probe card
An evaluation method of a probe mark of a probe needle of a probe card, includes the steps of: forming the probe mark of the probe needle on a probe mark evaluation wafer; recognizing the probe mark with imaging; and overlapping an imaginary electrode pad with the probe mark recognized by imaging so that the probe mark is evaluated.Filed by Socionext, this record illustrates how probe-mark quality control is claimed as a standalone imaging-based evaluation method rather than folded into probe-card hardware claims.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US5974662A | Method of planarizing tips of probe elements of a probe card assembly | 763 |
| 2 | US5172050A | Micromachined semiconductor probe card | 402 |
| 3 | US6029344A | Composite interconnection element for microelectronic components, and method of making same | 386 |
| 4 | US6509751B1 | Planarizer for a semiconductor contactor | 356 |
| 5 | US6181144B1 | Semiconductor probe card having resistance measuring circuitry and method fabrication | 310 |
| 6 | US5644245A | Probe apparatus for inspecting electrical characteristics of a microelectronic element | 301 |
| 7 | US5422574A | Large scale protrusion membrane for semiconductor devices under test with very high pin counts | 262 |
| 8 | US5869974A | Micromachined probe card having compliant contact members for testing semiconductor wafers | 261 |
| 9 | US6050829A | Making discrete power connections to a space transformer of a probe card assembly | 252 |
| 10 | US5225037A | Method for fabrication of probe card for testing of semiconductor devices | 251 |
Citation counts are drawn from a searched corpus and skew toward older, foundational filings — treat them as a measure of influence on later claims, not of current commercial relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Four read-outs from the dataset that matter more for decision-making than the raw counts.
The core mechanics were claimed early
The 2018 peak of 51 filings, falling to 21 by 2022, suggests the foundational planarization, MEMS-probe and contact-resistance approaches were substantially staked out in the late 2010s. New filings since then are more likely to be refinements of existing architectures than new base claims.
Filing is US-centred with a strong Japan tail
The United States accounts for 834 of the tracked filings, more than double Japan's 173. WIPO/PCT (158) and EPO (132) filings indicate a meaningful share of applicants pursue multi-jurisdiction protection, while China and South Korea sit lower at 61 each — worth watching for future shifts.
A handful of 1990s filings still anchor the field
The most-cited record in the corpus, on planarizing probe element tips, carries 763 citations — more than any other patent tracked here. Four of the five most-cited records deal with mechanical planarization or probe-tip composite structures, not signal-path electronics, indicating that mechanical contact quality remains the most heavily built-upon problem.
Collaboration is thin and inventor-centred
Only 10 co-assignee pairs appear across the corpus, and the strongest — FormFactor with a single named inventor, at 19 shared filings — looks like an internal inventor-assignee relationship rather than a cross-company alliance. This is a field where companies largely file alone.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to wafer probe cards and test interfaces, with the prior art for and against each one.
Who holds the claim territory
Filing activity concentrates among a small set of specialist probe-card manufacturers and large device makers who test their own output, with momentum across the board slowing in the most recent tracked year.
FormFactor
The strongest co-assignee relationships in the dataset all involve FormFactor and named individual inventors, consistent with a company whose probe-card IP is built through a small internal invention team rather than external partnerships.
TSMC (Taiwan Semiconductor Manufacturing Company)
As a foundry testing its own wafers at scale, TSMC's presence in the probe-card corpus reflects process-integration claims — matching probe design to specific device geometries — rather than standalone probe-card hardware sales.
Tokyo Electron
Tokyo Electron's filings sit at the intersection of wafer handling equipment and test interface design, a natural pairing given its position in the broader fab equipment supply chain.
| Assignee | Recent year | YoY |
|---|---|---|
| FormFactor, Inc. | 0 | -100% |
| Technoprobe S.p.A. | 0 | — |
| Tokyo Electron Limited | 0 | — |
| Nanonexus, Inc. | 0 | — |
| Taiwan Semiconductor Manufacturing Company (TSMC) | 0 | -100% |
| Micron Technology, Inc. | 0 | — |
| NHK Spring Co., Ltd. | 0 | — |
| NEC Corporation | 0 | — |
Where to take this next
The landscape points to a mature claim base with specific openings rather than a wide-open field.
Map claim boundaries around the top-cited patents
The five most-cited records, several from the 1990s, still anchor mechanical planarization and contact-resistance claims. Any new probe-tip design should be checked against these before drafting.
Explore citation trees in EurekaWatch the under-claimed signal-path and plating branches
High-frequency signal path and probe-tip electroplating carry lower filing density than the core mechanical claims, suggesting room for narrowly targeted filings that avoid the densest prior art.
Run a white space search in EurekaTrack whether the 2026 dip is lag or a real slowdown
Every leading assignee shows zero filings in the latest tracked year. Re-checking this trend line in twelve months will separate publication lag from a genuine pullback in new probe-card investment.
Set a filing alert in EurekaCommon questions about probe card patents
Specialist probe-card manufacturers such as FormFactor hold a dense cluster of filings, particularly around planarization and MEMS probe design, alongside device manufacturers like TSMC and equipment suppliers like Tokyo Electron who file on process-integration aspects of testing. The corpus shows filing concentrated among a relatively small number of named assignees rather than spread evenly across the industry. Co-assignee data suggests most of this IP is built through internal inventor teams rather than joint ventures, so tracking a company's own named inventors is often as informative as tracking the corporate assignee alone.
Filing peaked at 51 records in 2018 and had fallen to 21 by the 2022 midpoint of the tracked window, a pattern consistent with the core mechanical and electrical approaches — tip planarization, MEMS fabrication, resistance-measurement circuitry — being substantially claimed in the late 2010s. Later filings tend to refine existing architectures rather than introduce new base claims. Part of the apparent drop toward 2026 is also a publication-lag artifact, since patent applications typically take around eighteen months to publish, so the very latest years in any chart will always look lower than they eventually turn out to be.
The most-cited patents in this space claim either mechanical structures — probe tip planarization methods, composite interconnection elements, MEMS-machined probe assemblies — or measurement and evaluation methods, such as resistance-measurement circuitry built into the card or imaging-based probe-mark evaluation on test wafers. Claims frequently combine a physical probe or contact structure with a specific test or calibration method, which is why the IPC composition of this corpus spans both electric measurement (G01R) and semiconductor device (H01L) codes rather than sitting in a single class.
Relative to the dense mechanical planarization and probe-tip claim territory, filing density is thinner around high-frequency signal path calibration, probe-tip electroplating process refinements, and high pin count interconnect density — areas that appear as secondary IPC clusters (C25D, H01R) rather than the dominant G01R and H01L codes. These branches are good candidates for narrowly scoped new filings that sidestep the most heavily cited 1990s-era patents on tip planarization and composite interconnects.
Several of the most-cited patents in this corpus date to the 1990s, including the top-cited planarization method with 763 citations — old enough that many are likely expired, but their claim language still frames how later patents describe planarity and contact resistance, so they remain essential prior-art references even after expiry. A freedom-to-operate search should treat high citation count as a signal that a patent's language shaped the field's vocabulary, not as evidence that it is still enforceable; each candidate patent's status needs individual verification against its filing jurisdiction and term.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.