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Model-order reduction vs full-wave simulation for PCB EM

Model-Order Reduction vs Full-Wave Simulation for PCB EM Analysis — PatSnap Insights
Engineering & R&D Intelligence

Full-wave simulation solves Maxwell’s equations in complete form but can require tens of millions of unknowns for a single complex PCB. Model-order reduction cuts that cost by up to four orders of magnitude — but the two approaches are complementary, not competing. This analysis draws on over 40 patents and research papers spanning 1994 to 2026 to explain when each method applies and where the field is heading.

PatSnap Insights Team Innovation Intelligence Analysts 11 min read
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Reviewed by the PatSnap Insights editorial team ·

Full-Wave Simulation: Physical Completeness at Extreme Computational Cost

Full-wave simulation resolves electromagnetic fields by solving the complete Maxwell’s equations across a discretized three-dimensional representation of a PCB, capturing wave propagation, radiation, coupling, and reflection effects without simplification. Implemented via finite element methods (FEM), method of moments (MoM), or finite-difference time-domain (FDTD) techniques, it is the accuracy gold standard — but that accuracy comes at a severe computational price that makes it impractical for routine full-board analysis.

10M+
Unknowns in FEM matrix equations for complex PCBs
10,000×
Reduction in equivalent circuit components via MOR (Philips, 1997)
40+
Patents and papers analysed, spanning 1994–2026
2019–2026
Period dominated by Chinese institutional IP filings

The fundamental advantage of full-wave analysis is physical completeness. Research from Hankyong National University (2018) demonstrated that full-wave techniques can accurately predict parallel-plate noise suppression in electromagnetic bandgap (EBG) structures by resolving quasi-TEM and transverse magnetic modes through spatial decomposition — detail that cannot be replicated by simplified circuit-level representations. Work from Hangzhou Dianzi University (2023) similarly showed that projection-based mesh schemes and edge-refinement for current concentration are essential for accurate full-wave results in high-density structures.

The computational burden, however, is well-documented across the patent and literature corpus. A 2017 paper from Universiti Tun Hussein Onn Malaysia explicitly states that full-wave simulation is “not a suitable option since it requires intensive computational time and thus increasing the unit cost.” A 2023 Chinese patent from Taicang Tongwei Electronics reinforces this, observing that “full-wave modeling of printed circuit boards is not a practical choice” given real-world PCB complexity. Most quantitatively, a 2026 patent from Julin Technology Shanghai notes that for complex PCBs, the number of unknowns in finite element matrix equations can reach tens of millions, making solver efficiency the dominant bottleneck.

For complex PCBs, the number of unknowns in finite element matrix equations can reach tens of millions, making full-wave simulation computationally prohibitive for practical iterative design workflows — a finding documented in a 2026 patent from Julin Technology Shanghai.

Even in domains where full-wave tools are indispensable — such as ultrawideband antenna design — their direct use in an optimization loop is acknowledged as “computationally expensive” and potentially “impractical,” as shown by Reykjavik University’s 2011 work on simulation-driven antenna design. A 2020 benchmarking study from Northern Border University, comparing method-of-moments against the transverse wave formulation for RF/microwave structures, found that both qualify as full-wave approaches and that computational complexity evaluation is essential when selecting a solver — there is no universally optimal full-wave method.

“Full-wave modeling of printed circuit boards is not a practical choice given the complexity of real-world PCB designs and the absence of complete component-level information.”

Model-Order Reduction: Algorithms, Efficiency Gains, and PCB Applications

Model-order reduction (MOR) addresses the computational burden of full-wave simulation by projecting a high-dimensional system of equations onto a much smaller subspace that preserves the dominant electromagnetic behavior of a PCB structure, enabling the resulting reduced-order model (ROM) to be evaluated orders of magnitude faster than the original system. The foundational mechanism was established by U.S. Philips Corporation in 1997: a conductor pattern is represented as geometrical elements at sub-wavelength scale; a subset of elements spaced approximately one wavelength apart is selected; field values at non-selected elements are expressed in terms of the selected ones; and a low-rank admittance matrix is correlated with the Maxwell equation matrices. The result is “an effective reduction of four orders of magnitude in the number of equivalent circuit components without losing model accuracy.”

What is a Reduced-Order Model (ROM)?

A reduced-order model is a computationally compact surrogate for a high-dimensional electromagnetic system. It is constructed by projecting the original system onto a low-dimensional subspace — typically via Krylov subspace methods — that captures the dominant input-output behavior. ROMs can be expressed as SPICE-compatible RLC networks or state-space models, enabling direct integration into circuit simulators without the lossy S-parameter export step required by full-wave tools.

Krylov Subspace Methods: The Algorithmic Backbone

Krylov subspace methods — including Arnoldi iteration, block Lanczos, and Padé approximations — are the most algorithmically mature branch of MOR for circuit networks. Motorola’s 1999 patent employs multipoint matrix Padé approximation via block Lanczos vectors to reduce large linear circuit state equations, detecting and treating numerical breakdowns to maintain stability. Synopsys extended this to interconnect stitching in 2004, where Arnoldi-based ROMs for individual circuit segments are combined using rank-one updates to Modified Nodal Analysis (MNA) matrices — enabling system-level simulation without recomputing each subsystem’s original parasitic network. IBM’s 2006 patent formulates MOR around revealing correlations between input or output terminals of complex circuits, eliminating redundant degrees of freedom without recomputing the original parasitic model. Chang Gung University’s 2007 patent applies Krylov subspace congruence transformations to MNA matrices for VLSI interconnect circuits, enabling signal integrity analysis under high-speed conditions where direct simulation is intractable.

Figure 1 — MOR Algorithm Families for PCB Electromagnetic Simulation
Model-Order Reduction Algorithm Families for PCB Electromagnetic Simulation — Krylov Subspace, Reduced-Basis, and Parameterized MOR 0 2 4 6 Patent/Paper Count 5 3 3 2 Krylov Subspace Reduced- Basis Parameterized MOR Substructure / Domain Decomp. Krylov Subspace Reduced-Basis Parameterized MOR Substructure / Domain Decomp.
Krylov subspace methods are the most represented MOR algorithm family in the patent and literature corpus, with five distinct implementations documented across Motorola, Synopsys, IBM, Chang Gung University, and Harbin Institute of Technology. Reduced-basis and parameterized MOR approaches each appear in three works.

Frequency-Domain FEM with MOR: Addressing Nonaffine Dependence

Frequency-domain FEM with MOR is a particularly active research direction for microwave components. Gdansk University of Technology’s 2021 paper presents a reduced-basis method with a sparsified greedy strategy for selecting expansion frequency points, specifically targeting problems with frequency-dependent material permittivity or permeability tensors and frequency-dependent waveguide mode patterns — the nonaffine frequency dependence problem that standard MOR formulations cannot handle. Their 2019 paper proposes simultaneous diagonalization of local macromodels assembled from subdomains, combined with a Schur complement-based solver, directly addressing scalability when many identical substructures such as via arrays are present.

For interconnect circuit networks, Harbin Institute of Technology at Weihai (2021) proposes power-function-series expansions to replace the state function of the original system, achieving fast simulation with controllable accuracy. The University of Toronto’s 2020 parameterized MOR framework using PACT preprocessing enables on-the-fly ROM generation for any RC line of fixed topology without rerunning the full reduction procedure — directly applicable to PCB trace modeling. According to IEEE, parameterized MOR approaches of this type are among the most active areas in computational electromagnetics research.

Philips’ 1997 PCB simulation patent demonstrated a four-orders-of-magnitude reduction in equivalent circuit components without loss of model accuracy, by selecting a subset of conductor elements spaced approximately one wavelength apart and expressing field values at non-selected elements in terms of the selected ones.

The Max Planck Institute’s 2022 work introduces compact, certified error estimators to quantify ROM accuracy relative to the original full-order model — addressing a critical gap: most prior MOR implementations relied on heuristic accuracy assessments, which are unreliable when the full state vector — not merely output quantities — is needed. Cadence Design Systems’ 2024 patent extends MOR into the time-varying context of harmonic balance analysis, reducing training models into a reduced-order space to characterize nonlinear circuits, demonstrating MOR’s extension beyond linear, frequency-domain problems.

Explore the full patent landscape for model-order reduction and PCB EM simulation in PatSnap Eureka.

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Where Each Approach Is Actually Deployed

The choice between full-wave simulation and MOR is strongly application-context-dependent, with distinct deployment patterns emerging from the patent and literature corpus. Full-wave simulation is deployed where physical completeness of the field solution is non-negotiable; MOR is deployed where repeated evaluation, parametric sweeps, and optimization loops demand computational speed.

Full-Wave: EMC Analysis and Interconnect Ground Truth

Beijing Jiaotong University’s 2018 paper uses field-circuit co-simulation with frequency-variable excitation sources to predict near-field E and H distributions for EMC analysis of switching power supply PCBs, improving design by reducing vias and increasing trace width. GAC Aion’s 2023 patent establishes a 3D full-wave model combining simplified enclosure geometry data with near-field data imported from individual board-level analyses, enabling system-level EMI prediction across multiple PCBs. Shanghai Aviation Electric’s 2025 patent chains SIwave parameter extraction, Designer field-circuit co-simulation, and HFSS field-to-field linked simulation in a four-step workflow to achieve product-level radiated emission assessment.

Full-wave tools also anchor interconnect modeling workflows as ground-truth generators. Hewlett-Packard’s 2000 and 2001 patents describe a CAD system where full-wave EM simulations generate reference data, and parameterized multinomial approximations are fitted to these simulations. The full-wave solver defines the “predefined accuracy” that the parametric model must match — a formal acknowledgment that full-wave simulation and MOR operate in sequence, not in isolation. As WIPO‘s patent trend data confirms, this complementary architecture has become the dominant design paradigm in advanced PCB EDA toolchains.

MOR: Signal Integrity, Power Integrity, and Optimization Loops

MOR is predominantly deployed in scenarios requiring repeated evaluation. Chang Gung University’s 2007 patent reduces VLSI interconnect circuits using Krylov subspace congruence transformations for signal integrity analysis under high-speed conditions. Yu Hao’s 2008 patent targets RLC circuit VLSI layouts, preserving block-level sparsity, hierarchy, and latency while generating macromodels for thermal and power integrity co-optimization. Cadence’s 2014 patent on power delivery network analysis uses EM model extraction for discontinuity structures combined with adaptive meshing.

Key Finding: Multifidelity Frameworks Are the Current Frontier

Reykjavik University’s 2022 paper on reduced-cost optimization-based miniaturization uses multi-resolution EM simulations — starting at coarse fidelity and progressively increasing to full-wave accuracy as optimization converges — combining both paradigms in a single workflow. University of L’Aquila’s 2021 paper combines PEEC with metamodelling in a multifidelity framework inspired by multilevel Monte Carlo methods, enabling uncertainty quantification at reduced computational cost. Both represent the design frontier where MOR and full-wave simulation are no longer alternatives but sequential stages of a unified analysis pipeline.

For broadband circuit-oriented EM modeling in power electronics, Luleå University of Technology’s 2021 paper contrasts the 3-D Partial Element Equivalent Circuit (PEEC) method against equivalent RLCG-circuit extraction, framing the choice explicitly as a trade-off between accuracy (PEEC, which retains more full-wave physics) and computational complexity (RLCG, which is a reduced representation). This framing — accuracy versus speed — is the organizing tension throughout the entire corpus, and it is one that standards bodies including IEC are increasingly addressing through updated EMC simulation guidance.

Figure 2 — Patent Filing Timeline: Full-Wave vs. MOR for PCB EM Simulation (1994–2026)
PCB Electromagnetic Simulation Patent Filing Timeline — Full-Wave vs. Model-Order Reduction, 1994–2026 0 2 4 6 Publications 1 2 2 2 0 2 1 0 2 1 4 6 1994–99 2000–04 2005–09 2010–14 2015–19 2020–26 Full-Wave Simulation Model-Order Reduction
MOR publication and patent activity surges in the 2020–2026 period, driven predominantly by Chinese institutional and industrial assignees. Full-wave simulation filings also increase in this era, reflecting system-level EMC analysis for automotive and aerospace applications.

Chinese institutional and industrial assignees — including Hangzhou Dianzi University, Harbin Institute of Technology, Beijing Jiaotong University, Zhengzhou Yunhai, Langes Commercial Machines, Julin Technology Shanghai, and GAC Aion — dominate the most recent PCB EM simulation patent filings from 2019 to 2026, representing a major shift in IP generation toward China.

Key Patent Holders and Innovation Trends

The patent corpus reveals a clear stratification of contributors by type and era, with distinct roles for foundational IP holders, active commercial EDA vendors, leading academic groups, and emerging application-domain entrants.

Philips Electronics / U.S. Philips Corporation established the earliest and most broadly cited PCB-specific MOR framework, with four related patent filings (EP 1994, EP 1995, EP 2001, US 1997) all covering PCB simulation on the basis of reduced equivalent circuits. The four-orders-of-magnitude reduction claim anchors the field. Fujitsu holds the most numerous high-frequency simulation patents in the dataset, with three closely related filings (JP 2002, JP 2007, US 2006) covering DC/skin-resistance-based RLC model partitioning for wiring patterns, plus separate patents on conductor skin-effect simulation and electromagnetic field intensity calculation — positioning Fujitsu as the dominant patent holder for hybrid RLC/high-frequency wiring analysis.

Cadence Design Systems is the most active commercial EDA vendor in MOR, represented by an active 2024 patent on MOR-based envelope Fourier techniques and a 2014 patent on PDN analysis, demonstrating continued investment in MOR for circuit characterization. Synopsys and IBM each hold foundational MOR patents for interconnect networks: Synopsys for stitching reduced-order interconnect models (2004) and IBM for efficient MOR in electric and electronic circuit design (2006). According to data tracked by EPO, these EDA vendors collectively represent the largest share of commercialized MOR IP in the electronics design automation sector.

Gdansk University of Technology (Faculty of Electronics, Telecommunications and Informatics) is the most prolific academic contributor, with at least three publications directly on MOR for FEM-based EM simulation (2019, 2021, 2021) and additional work on surrogate modeling for on-chip inductors. Their consistent focus on diagonalized macromodels, nonaffine frequency dependence, and multifidelity surrogates positions them as the leading academic group in this niche. The Boeing Company represents an emerging application domain, with two 2023 patents on modeling new designs for electromagnetic effects that couple structural and electromagnetic features in reduced-order models trained on test and simulation data — extending MOR into lightning-strike and airframe EM analysis.

Track patent activity from Cadence, Synopsys, IBM, and emerging Chinese assignees across PCB EM simulation with PatSnap Eureka.

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Head-to-Head: A Structured Comparison of Full-Wave Simulation and MOR

The two methodologies are complementary rather than competing: full-wave solvers generate the high-fidelity reference data from which ROMs are constructed or against which they are validated. The following comparison, drawn entirely from the patent and literature corpus, maps the key dimensions of difference and the specific works that document each claim.

Dimension Full-Wave Simulation Model-Order Reduction
Physical basis Complete Maxwell’s equations; resolves all propagating and evanescent wave phenomena Projection onto a reduced subspace; captures dominant behavior within a validity envelope
Computational cost High to extremely high; tens of millions of unknowns for complex PCBs (Julin Technology, 2026) Low to moderate; ROM evaluation is orders of magnitude faster than the original system
Accuracy Benchmark-level; valid across all frequency ranges and geometry types High within training/expansion frequency range; degrades outside validity envelope
Frequency sweep Requires re-solving at each frequency point Enables rapid broadband sweeps via reduced-basis or Padé approximation (Gdansk, 2021)
Parametric studies Very expensive; each design point requires a separate full solve Efficient; parameterized MOR enables fast sweeps over geometry and material parameters (Yu Hao, 2008)
Circuit simulator integration Requires S-parameter export and re-import; coupling is lossy ROMs expressed as SPICE-compatible RLC networks or state-space models (Philips, 1997; Motorola, 1999)
Nonlinear/time-varying circuits Directly applicable in time-domain formulations Recently extended via Cadence’s MOR-Envelope Fourier technique (2024); maturity is lower
Accuracy certification Result is the reference; no certification needed Requires error estimators; addressed by Max Planck’s certified reduced-basis approach (2022)
Repeated structures (via arrays, EBG) Requires re-meshing each instance; expensive Substructure MOR (Gdansk diagonalized macromodels, 2019) handles repeated features efficiently
Practical PCB EMC use Deployed for near-field/far-field radiation (Beijing Jiaotong, 2018); acknowledged as impractical for full-board analysis Used for signal integrity, power integrity, and conducted EMI modeling in iterative design flows

Krylov subspace methods — including Arnoldi iteration, block Lanczos, and multipoint Padé approximation — are the algorithmic backbone of model-order reduction for PCB interconnect analysis, as documented in patents from Motorola (1999), Synopsys (2004), IBM (2006), and Chang Gung University (2007).

The key architectural insight across the corpus is that full-wave simulation and MOR are sequential stages of a unified analysis pipeline. Hewlett-Packard’s 2000 interconnect modeling patent formalizes this: full-wave EM simulations define the “predefined accuracy” that the parameterized model must match. Reykjavik University’s 2022 reduced-cost optimization work uses multi-resolution EM simulations — starting at coarse fidelity and progressively increasing to full-wave accuracy as optimization converges — as a single workflow. The PEEC-metamodel combination from University of L’Aquila (2021) applies the same logic to uncertainty quantification, using multilevel Monte Carlo-inspired methods to achieve statistical analysis at a fraction of the full-wave cost. These multifidelity frameworks, combining both paradigms, represent the current frontier of PCB EM simulation research, as reflected in the growing volume of patent and literature activity documented by the PatSnap innovation intelligence platform.

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Model-order reduction vs. full-wave simulation — key questions answered

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Referenzen

  1. PCB Simulation on Basis of Reduced Equivalent Circuit — U.S. Philips Corporation, 1997
  2. PCB Simulation on Basis of Reduced Equivalent Circuit — Philips Electronics N.V. (EP), 1994
  3. PCB Simulation on Basis of Reduced Equivalent Circuit — Philips Electronics N.V. (EP), 2001
  4. A Model-Order Reduction Approach for Electromagnetic Problems with Nonaffine Frequency Dependence — Gdansk University of Technology, 2021
  5. Diagonalized Macromodels in Finite Element Method for Fast Electromagnetic Analysis of Waveguide Components — Gdansk University of Technology, 2019
  6. On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate Method — Harbin Institute of Technology at Weihai, 2021
  7. Method for Generating a Reduced Order Model of an Electronic Circuit — Motorola Inc., 1999
  8. Method, System, and Computer Program Product for Characterizing an Electronic Circuit Using Model Order Reduction-Based Envelope Fourier Techniques — Cadence Design Systems, Inc., 2024
  9. System and Method for Efficient Model Order Reduction in Electric and Electronic Circuit Design — IBM, 2006
  10. Methodology for Stitching Reduced-Order Models of Interconnects Together — Synopsys, Inc., 2004
  11. Method and Apparatus for Model-Order Reduction and Sensitivity Analysis — Chang Gung University, 2007
  12. Structured and Parameterized Model Order Reduction — Yu, Hao, 2008
  13. Fast A Posteriori State Error Estimation for Reliable Frequency Sweeping in Microwave Circuits via the Reduced-Basis Method — Max Planck Institute, 2022
  14. Unit-Cell-Based Domain Decomposition Method for Efficient Simulation of a Truncated Electromagnetic Bandgap Structure in High-Speed PCBs — Hankyong National University, 2018
  15. Co-Simulation Analysis Method for Improving PCB EMC Performance — Beijing Jiaotong University, 2018
  16. Partial Element Equivalent Circuit–Metamodel Combination for Fast Tolerance Analysis — University of L’Aquila, 2021
  17. Reduced-Cost Optimization-Based Miniaturization — Reykjavik University, 2022
  18. Model Order Reduction for Lumped RC Transmission Lines — University of Toronto, 2020
  19. Modeling New Designs for Electromagnetic Effects — The Boeing Company, 2023
  20. IEEE — Institute of Electrical and Electronics Engineers (authority source)
  21. WIPO — World Intellectual Property Organization (patent trend data)
  22. EPO — European Patent Office (EDA sector patent data)
  23. IEC — International Electrotechnical Commission (EMC simulation standards)

All data and statistics in this article are sourced from the references above and from PatSnap‘s proprietary innovation intelligence platform.

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